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ATWINC3400 Datasheet(PDF) 12 Page - ATMEL Corporation

No. de pieza ATWINC3400
Descripción Electrónicos  Single Chip IEEE 802.11 b/g/n Network Controller withIntegrated Bluetooth 4.0
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATWINC3400 Datasheet(HTML) 12 Page - ATMEL Corporation

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ATWINC3400-Datasheet [PRELIMINARY DATASHEET]
Atmel-42396C-SmartConnect-ATWINC3400_Preliminary-Datasheet_07/2015
1
2
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5.2
Low Power Oscillator
ATWILC3400 requires an external 32.768kHz clock to be used for sleep operation, which is provided through
Pin 28 or Pin 41. The frequency accuracy of the external clock has to be within ±200ppm.
6
CPU and Memory Subsystems
6.1
Processor
ATWILC3400 has a Cortus APS3 32-bit processor. This processor performs many of the MAC functions,
including but not limited to association, authentication, power management, security key management, and
MSDU aggregation/de-aggregation. In addition, the processor provides flexibility for various modes of
operation, such as STA and AP modes.
6.2
Memory Subsystem
The APS3 core uses a 256KB instruction/boot ROM (160KB for 802.11 and 96KB for BLE) along with a 420KB
instruction RAM (128KB for 802.11 and 292KB for BLE), and a 128KB data RAM (64KB for 802.11 and 64KB
for BLE). In addition, the device uses a 160KB shared/exchange RAM (128KB for 802.11 and 32KB for BLE),
accessible by the processor and MAC, which allows the processor to perform various data management tasks
on the TX and RX data packets.
6.3
Non-Volatile Memory (eFuse)
ATWILC3400 has 768 bits of non-volatile eFuse memory that can be read by the CPU after device reset. This
non-volatile one-time-programmable memory can be used to store customer-specific parameters, such as
802.11 MAC address, BLE address, and various calibration information, such as TX power, crystal frequency
offset, etc., as well as other software-specific configuration parameters. The eFuse is partitioned into six 128-
bit banks. The bit map of the first and last banks is shown in Figure 6-1. The purpose of the first 80 bits in bank
0 and the first 56 bits in bank 5 is fixed, and the remaining bits are general-purpose software dependent bits, or
reserved for future use. Since each bank and each bit can be programmed independently, this allows for
several updates of the device parameters following the initial programming, e.g., updating 802.11 MAC
address or BLE address (this can be done by invalidating the last programmed bank and programming a new
bank). Refer to ATWILC3400 Programming Guide for the eFuse programming instructions.


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