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FAN5026 Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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FAN5026 Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 17 page 5 www.fairchildsemi.com FAN5026 Rev. 1.0.5 Electrical Specifications Recommended operating conditions, unless otherwise noted. Parameter Conditions Min. Typ. Max. Units Power Supplies VCC Current LDRV, HDRV Open, VSEN forced above regulation point 2.2 3.0 mA Shut-down (EN=0) 30 µA VIN Current – Sinking VIN = 15V 10 30 µA VIN Current – Sourcing VIN = 0V –15 –30 µA VIN Current – Shut-down 1 µA UVLO Threshold Rising VCC 4.3 4.55 4.75 V Falling 4.1 4.25 4.45 V UVLO Hysteresis 300 mV Oscillator Frequency 255 300 345 KHz Ramp Amplitude, pk–pk VIN = 16V 2 V Ramp Amplitude, pk–pk VIN = 5V 1.25 V Ramp Offset 0.5 V Ramp / VIN Gain VIN ≥ 3V 125 mV/V Ramp / VIN Gain 1V < VIN < 3V 250 mV/V Reference and Soft Start Internal Reference Voltage 0.891 0.9 0.909 V Soft Start Current (ISS) at start-up –5 µA Soft Start Complete Threshold 1.5 V PWM Converters Load Regulation IOUTX from 0 to 5A, VIN from 5 to 15V -2 +2 % VSEN Bias Current 50 80 120 nA Under-Voltage Shutdown as % of set point. 2 µS noise filter 70 75 80 % Over-Voltage Threshold as % of set point. 2 µS noise filter 115 120 125 % ISNS Over-Current Threshold RILIM= 68.5KΩ see Figure 10. 112 140 168 µA Minimum Duty Cycle 10 % Output Drivers HDRV Output Resistance Sourcing 12 15 Ω Sinking 2.4 4 Ω LDRV Output Resistance Sourcing 12 15 Ω Sinking 1.2 2 Ω PG (Power Good Output) and Control pins Lower Threshold as % of set point, 2 µS noise filter –86 –94 % Upper Threshold as % of set point, 2 µS noise filter 108 116 % PG Output Low IPG = 4mA 0.5 V Leakage Current VPULLUP = 5V 1 µA PG2/REF2OUT Voltage DDR = 1, 0 mA < IREF2OUT < 10mA 99 1.01 % VREF2 DDR, EN Inputs Input High 2 V Input Low 0.8 V |
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