MOTOROLA CMOS LOGIC DATA

1

MC14093B

Quad 2-Input NAND"

Schmitt Trigger

The MC14093B Schmitt trigger is constructed with MOS P–channel and

N–channel enhancement mode devices in a single monolithic structure.

These devices find primary use where low power dissipation and/or high

noise immunity is desired. The MC14093B may be used in place of the

MC14011B quad 2–input NAND gate for enhanced noise immunity or to

“square up” slowly changing waveforms.

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–Power TTL Loads or One Low–Power

Schottky TTL Load Over the Rated Temperature Range

• Triple Diode Protection on All Inputs

• Pin–for–Pin Compatible with CD4093

• Can be Used to Replace MC14011B

• Independent Schmitt–Trigger at each Input

Symbol

Parameter

Value

Unit

VDD

DC Supply Voltage

– 0.5 to + 18.0

V

Vin, Vout Input or Output Voltage (DC or Transient)

– 0.5 to VDD + 0.5

V

Iin, Iout

Input or Output Current (DC or Transient),

per Pin

± 10

mA

PD

Power Dissipation, per Package†

500

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature (8–Second Soldering)

260

_C

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/

_C From 65_C To 125_C

Ceramic “L” Packages: – 12 mW/

_C From 100_C To 125_C

EQUIVALENT CIRCUIT SCHEMATIC

(1/4 OF CIRCUIT SHOWN)

This device contains protection circuitry to guard against damage

due to high static voltages or electric fields. However, precautions must

be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, Vin and

Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage

level (e.g., either VSS or VDD). Unused outputs must be left open.

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

REV 3

1/94

MC14077B

See Page 6-160

MC14078B, MC14081B, MC14082B

See Page 6-5

MC14093B

L SUFFIX

CERAMIC

CASE 632

ORDERING INFORMATION

MC14XXXBCP

Plastic

MC14XXXBCL

Ceramic

MC14XXXBD

SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 646

D SUFFIX

SOIC

CASE 751A

LOGIC DIAGRAM

13

11

VDD = PIN 14

VSS = PIN 7

10

4

3

12

9

8

6

5

2

1