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FAN3213 Datasheet(PDF) 13 Page - ON Semiconductor |
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FAN3213 Datasheet(HTML) 13 Page - ON Semiconductor |
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13 / 19 page  www.onsemi.com 13 Layout and Connection Guidelines The FA N3213 and FAN3214 gate dr ivers incorporate fast-reacting input circuits, short propagation delays, and pow erful output stages capable of delivering current peaks over 4 A to facilitate voltage transition times from under 10 ns to over 150 ns. The follow ing layout and connection guidelines are strongly recommended: Keep high-current output and pow er ground paths separate from logic input signals and signal ground paths. This is especially critical for TTL-level logic thresholds at driver input pins. Keep the driver as close to the load as possible to minimize the length of high-current traces. This reduces the series inductance to improve high- speed sw itching, w hile reducing the loop area that can radiate EMI to the driver inputs and surrounding circuitry. If the inputs to a channel are not externally connected, the internal 100 k resistors indicated on block diagrams command a low output. In noisy environments, it may be necessary to tie inputs of an unused channel to VDD or GND using short traces to prevent noise from causing spurious output sw itching. Many high-speed pow er circuits can be susceptible to noise injected from their ow n output or other external sources, possibly causing output re- triggering. These effects can be obvious if the circuit is tested in breadboard or non-optimal circuit layouts w ith long input or output leads. For best results, make connections to all pins as short and direct as possible. FAN3213 and FAN3214 are pin-compatible w ith many other industry-standard drivers. The turn-on and turn-off current paths should be minimized, as discussed in the follow ing section. Figure 29 show s the pulsed gate drive current path w hen the gate dr iver is supplying gate charge to turn the MOSFET on. The current is supplied from the local bypass capacitor, CBYP, and flow s through the driver to the MOSFET gate and to ground. To reach the high peak currents possible, the resistance and inductance in the path should be minimized. The localized CBYP acts to contain the high peak current pulses w ithin this driver- MOSFET circuit, preventing them from disturbing the sensitive analog circuitry in the PWM controller. PWM VDS VDD CBYP FAN321x Figure 29. Current Path for MOSFET Turn-On Figure 30 show s the current path w hen the gate dr iver turns the MOSFET OFF. Ideally, the driver shunts the current directly to the source of the MOSFET in a s mall circuit loop. For fast turn-off times, the resistance and inductance in this path should be minimized. PWM VDS VDD CBYP FAN321x Figure 30. Current Path for MOSFET Turn-Off |
Número de pieza similar - FAN3213 |
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Descripción similar - FAN3213 |
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