UTCTA31142

LINEAR INTEGRATED CIRCUIT

4

QW-R103-015,A

FUNCTIONAL DESCRIPTION

The UTC TA31142 IF receiver IC incorporates a mixer, crystal-based local oscillator, IF amplifier, quadrature FM

demodulator, bit-rate filter, and 1–bit comparator and is capable of demodulating 2-level FSK input signals. In

addition, 1.0V regulator and 1.1V low battery alarm functions are provided.

POWER-DOWN FUNCTION

The entire receiver IC may be powered up and down through the control of the BS input (pin13). During power

down operation, the quiescent current consumption of the IC drops to approximately 0

µA. The high input impedance

of the BS pin allows for direct interfacing with the CMOS output of an off-chip micro controller.

CHARGE / DISCHARGE CIRCUITRY

The function of the charge / discharge circuitry is for both fast and slow charging / discharging of the capacitor

used for storing the voltage reference level of the FSKREF pin. The CHARGE input (pin14) should be enabled

(CHARGE=high=fast charge) immediately after transition of the receiver IC from power-down to normal operation in

order to reduce the charging / discharging time for coarse adjustment of the FSKREF voltage to the appropriate dc

level (i.e. dc level of LPFOUT pin) and consequently to minimize the erroneous output of the 1-bit comparator.

During actual data reception, the CHARGE pin should be set to low (CHARGE=low=slow charge) for fine adjustment

of the FSKREF voltage.

1-bit COMPARATOR

The integrated 1-bit comparator operates as a data slicer and “squares up” the bit-rate filtered output from the

quadrature demodulator. The decision threshold voltage level for the 1-bit comparator is stored on an external

capacitor connected to the FSKREF pin.

REGULATOR

The on-chip 1.0V regulator requires a suitable off-chip PNP transistor to achievc regulation. The external PNP

LOW BATTERY ALARM

The low battery alarm output, ALM, is normally low, but rises to 1.1V (=VCC) when the VCC voltage falls below

approximately 1.1V.