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GD5F2GQ4RFZIS Datasheet(PDF) 42 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD5F2GQ4RFZIS Datasheet(HTML) 42 Page - GigaDevice Semiconductor (Beijing) Inc. |
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42 / 57 page  SPI(x1/x2/x4) NAND Flash 2G 42 14.3 Status Register and Driver Register The NAND Flash device has a 16-bit status register that software can read during the device operation for operation state query. The status register can be read by issuing the GET FEATURES (0FH)command, followed by the feature address C0h (see FEATURE OPERATION). The Output Driver Register can be set and read by issuing the SET FEATURE (0FH) and GET FEATURE command followed by the feature address D0h (see FEATURE OPERATION).. Table14-2. Status Register Bit Descriptions Bit Bit Name Description P_FAIL Program Fail This bit indicates that a program failure has occurred (P_FAIL set to 1). It will also be set if the user attempts to program an invalid address or a protected region, including the OTP area. This bit is cleared during the PROGRAM EXECUTE command sequence or a RESET command (P_FAIL = 0). E_FAIL Erase Fail This bit indicates that an erase failure has occurred (E_FAIL set to 1). It will also be set if the user attempts to erase a locked region. This bit is cleared (E_FAIL = 0) at the start of the BLOCK ERASE command sequence or the RESET command. WEL Write Enable Latch This bit indicates the current status of the write enable latch (WEL) and must be set (WEL = 1), prior to issuing a PROGRAM EXECUTE or BLOCK ERASE command. It is set by issuing the WRITE ENABLE command. WEL can also be disabled (WEL = 0), by issuing the WRITE DISABLE command. OIP Operation In Progress This bit is set (OIP = 1 ) when a PROGRAM EXECUTE, PAGE READ, BLOCK ERASE, or RESET command is executing, indicating the device is busy. When the bit is 0, the interface is in the ready state. ECCS2~ECCS0 ECC Status ECCS2~ECCS0 provides ECC status as the following table. Table14-3. ECC Status ECCS2 ECCS1 ECCS0 Description 0 0 0 No bit errors were detected during the previous read algorithm. 0 0 1 Bit errors(<3) were detected and corrected. 0 1 0 Bit errors(=4) were detected and corrected. 0 1 1 Bit errors(=5) were detected and corrected. 1 0 0 Bit errors(=6) were detected and corrected. 1 0 1 Bit errors(=7) were detected and corrected. 1 1 0 Bit errors(=8) were detected and corrected. 1 1 1 Bit errors>8, error exceeded. And cannot be corrected. |
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