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ST7282 Datasheet(PDF) 3 Page - STMicroelectronics |
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ST7282 Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 23 page ST7282A5 - ST7282B5 - ROM FROM EPROM Family Issuer Ref. Chrono March 26, 1997 Previous Ref Edition ST7 PG-RO 97115 7282A5B5 Target C Page 3/23 1.1 Quick Reference The ST7282A5/B5 is a 32K ROM version of the ST72 family, using the ST72CORE and N-Well technology. It is derived from EPROM M4 version replacing EPROM by ROM. Two different commercial products are supported by this device : ST7282A5 (no LCD driver) func- tionnality described in specification SD70KL1618 ed. F) and ST7282B5 (LCD driver) functionnality described in specification 96096 ed. B). It contains an LCD controller/driver with 20 seg- ment and 16 backplane outputs able to drive up to 20 x 16 = 320 segments. The LCD control logic reads automatically data from the LCD-RAM independently from the ST7282 B5. Further it contains up to 62 I/O pins, 24 of them can be used as analog inputs to the 8 bit analog- digital converter. Each digital I/O pin can individu- ally be defined by software to work in one of the following modes: open-drain output, push pull out- put, input, input with pull-up (23 pins only) or inter- rupt input with pull up (23 pins only). 3 of the digital I/O pins serve as interface to the SIO. On pin PA4 the pull-up resistor is desactivated. Port pins PD, PE, PF, PG and PH are multiplexed with LCD Segment and backplane pins. A 512 byte EEPROM for non volatile storage of data is available. The programming voltage for that device is generated on chip without external components. So no extra supply is necessary. 16 bytes are protected against external readout. One interrupt vector is connected to the I/O ports. Five more interrupt vectors are available for the timer, the ADC, the serial I/O interface and the Group & Block Sync module (2). The watchdog can be set by the user in 64 increments from 2.8msec to 182msec ( f OSC = 8.55 MHz ). A synchronous 8 bit serial interface for serial data IN/OUT is also implemented. RDS signals can be decoded with the help of RDS filter, RDS demodulator and Group & Block Sync module. 1.2 Parameters The values below substitute the corresponding values in the specifications of dedicated functions. 1.2.1 Absolute maximum ratings 1.2.2 Recommended operating conditions The maximum accumulated current of all I/O pins should not exceed 40 mA for VDDP and 40 mA for VSSP. * except LCD pins ** MIL 883B Mode, 100pF through 1.5k Supply voltage ( VDD - VSS ) -0.3 ... +7V Input voltage* VIN VSS-0.3V...VDD+0.3V Output voltage* VOUT VSS-0.3V ... VDD+0.3V Input current Iin -10 ... +10mA Output current* IOUT -10 ... + 10mA Power dissipation PD tbd Storage temperature Tstg -55 ... +125°C Operation temperature Tamb -40 ... +85°C Display voltage (VLCD - VSS)VDD ... 7V Output voltage Seg+COM VOUT VSS-0.3V ... VLCD+0.3V ESD ESD 2500V LU susceptibility LU VDDA, Pin 52 - Class C Supply voltage (VDD - VSS) 4.5 ... 5.5V Supply votage difference (VDD, VDDP, VDDA) (VSS, VSSP, VSSA) 50mV |
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