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CDCDB2000 Datasheet(Hoja de datos) 27 Page - Texas Instruments

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No. de Pieza. CDCDB2000
Descripción  CDCDB2000 DB2000QL-Compliant 20-Output Clock Buffer for PCIe Gen 1 to Gen 5
Descarga  33 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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 27 page
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Recommended ground vias
Vias to escape
inside pins
All CKx pairs routed
differentially
27
CDCDB2000
www.ti.com
SNAS787 – NOVEMBER 2019
Product Folder Links: CDCDB2000
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
10 Layout
10.1 Layout Guidelines
The following section provides the layout guidelines to ensure good thermal performance and power supply
connections for the CDCDB2000.
10.2 Layout Examples
Figure 12 and Figure 13 are PCB layout examples that show the application of thermal design practices and a
low-inductance ground connection between the device DAP and the PCB.
The CDCDB2000 has 85-Ω differential output impedance LP-HCSL format drivers. All transmission lines
connected to CKx pins should be 85-Ω differential impedance, 42.5-Ω single-ended impedance to avoid
reflections and increased radiated emissions. Take care to eliminate or reduce stubs on the transmission lines.
Figure 12. PCB Layout Example for CDCDB2000, Top Layer




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