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PDAC11001APFBT Datasheet(PDF) 17 Page - Texas Instruments

No. de pieza PDAC11001APFBT
Descripción Electrónicos  DACx1001 20-Bit, 18-Bit, and 16-Bit, Low-Noise, Ultra-Low Harmonic Distortion, Fast-Settling, High-Voltage Output, Digital-to-Analog Converters (DACs)
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

PDAC11001APFBT Datasheet(HTML) 17 Page - Texas Instruments

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No power-on reset
Power-on reset
POR Threshold
Undefined
0.00
Operation Threshold
Supply Min
Supply Max
Supply (V)
Specified supply
voltage range
17
DAC11001A, DAC91001, DAC81001
www.ti.com
SLASEL0 – OCTOBER 2019
Product Folder Links: DAC11001A DAC91001 DAC81001
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Copyright © 2019, Texas Instruments Incorporated
8.3.4 Internal Power-On Reset (POR)
The DACx1001 incorporate two internal POR circuits for the DVDD, AVDD, IOVDD, VCC, and VSS supplies. The
POR signals are ANDed together, so that all supplies must be at the minimal specified values for the device to
not be in a reset condition. These POR circuits initialize internal registers, as well as set the analog outputs to a
known state while the device supplies are ramping. All registers are reset to default values. The DACx1001
power on with the DAC registers set to zero scale. The DAC can be powered down by writing 1 to PDN (bit 4,
address 02h). Typically, the POR function can be ignored as long as the device supplies power up and maintain
the specified minimum voltage levels. However, in the case of supply drop or brownout, the DACx1001 can have
an internal POR reset event. Figure 4 represents the internal POR threshold levels for the DVDD, AVDD, IOVDD,
VCC, and VSS supplies.
Figure 4. Relevant Voltage Levels for the POR Circuit
For the DVDD supply, no internal POR occurs for nominal supply operation from 2.7 V (supply minimum) to 5.5 V
(supply maximum). For a DVDD supply region between 2.5 V (undefined operation threshold) and 1.6 V (POR
threshold), the internal POR circuit may or may not provide a reset over all temperature conditions. For a DVDD
supply less than 1.6 V (POR threshold), the internal POR resets as long as the supply voltage is less than 1.6 V
for approximately 1 ms.
For the AVDD supply, no internal POR occurs for nominal supply operation from 4.5 V (supply minimum) to 5.5 V
(supply maximum). For an AVDD supply region between 4.1 V (undefined operation threshold) and 3.3 V (POR
threshold), the internal POR circuit may or may not provide a reset over all temperature conditions. For an AVDD
supply less than 3.3 V (POR threshold), the internal POR resets as long as the supply voltage is less than 3.3 V
for approximately 1 ms.
For the VCC supply, no internal POR occurs for nominal supply operation from 8 V (supply minimum) to 36 V
(supply maximum). For VCC supply voltages between 7.5 V (undefined operation threshold) to 6 V (POR
threshold), the internal POR circuit may or may not provide a reset over all temperature conditions. For a VCC
supply less than 6 V (POR threshold), the internal POR resets as long as the supply voltage is less than 6 V for
approximately 1 ms.
For the VSS supply, no internal POR occurs for nominal supply operation from –3 V (supply minimum) to –18 V
(supply maximum). For VSS supply voltages between –2.7 V (undefined operation threshold) to –1.8 V (POR
threshold), the internal POR circuit may or may not provide a reset over all temperature conditions. For a VSS
supply greater than –1.8 V (POR threshold), the internal POR resets as long as the supply voltage is higher than
–1.8 V for approximately 1 ms.


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