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DLPC900AZPC Datasheet(Hoja de datos) 53 Page - Texas Instruments

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No. de Pieza. DLPC900AZPC
Descripción  DLPC900 Digital Controller for Advanced Light Control
Descarga  83 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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 53 page
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53
DLPC900
www.ti.com
DLPS037D – OCTOBER 2014 – REVISED MARCH 2019
Product Folder Links: DLPC900
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Copyright © 2014–2019, Texas Instruments Incorporated
Typical Applications (continued)
8.2.1.1 Design Requirements
All applications require both the controller and DMD components for reliable operation. The system uses an
external parallel flash memory device loaded with the DLPC900 configuration and support firmware. The external
boot flash must contain a minimum of 2 sectors, where the first sector starts at address 0xF9000000 which is the
power-up reset start address. The first 128 kB is reserved for the bootlloader image and must be in its own
sector and can be made up of several smaller contiguous sectors that add up to 128 kB as shown in Figure 32.
The remaining sectors contains the rest of the firmware. The default wait-states is set for a flash device of 120-ns
access time. For a faster flash access time, refer to the Program Memory Flash Interface on how to program new
wait-state values.
Figure 32. Boot Flash Memory Layout
NOTE
The Bootloader, the Main Application, and any images stored in flash (if present) are
considered the firmware.
The chipset has the following interfaces and support circuitry:
DLPC900 System Interfaces
Control Interfaces
Trigger Interface
Input Data Interfaces
Illumination Interface
DLPC900 Support Circuitry and Interfaces
Reference Clock
PLL
Program Memory Flash Interface
DMD Interface
DLPC900 to DLP6500/DLP9000 Digital Data
DLPC900 to DLP6500/DLP9000 Control and Clock Interface
DLPC900 to DLP6500/DLP9000 Serial Communication Interface




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