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AD8152JBP Datasheet(PDF) 1 Page - Analog Devices |
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AD8152JBP Datasheet(HTML) 1 Page - Analog Devices |
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1 / 32 page  a AD8152* 34 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. *Patent Pending FEATURES Low Cost Low Power 2.0 W @ 2.5 V (Outputs Enabled) <100 mW @ 2.5 V (Outputs Disabled) 34 34, Fully Differential, Nonblocking Array 3.2 Gbps per Port NRZ Data Rate Wide Power Supply Range: 2.5 V to 3.3 V LVTTL or LVCMOS Level Control Inputs: @ 2.5 V to 3.3 V Low Jitter: 45 ps Drives a Backplane Directly Programmable Output Swing 100 mV to 1.6 V Differential 50 On-Chip I/O Termination User Controlled Voltage at the Load Minimizes Power Dissipation Dual Rank Latches Available in 256-Ball Grid Array APPLICATIONS Fiber Optic Network Switching High Speed Serial Backplane Routing to OC-48 with FEC Gigabit Ethernet Digital Video (HDTV) Data Storage Networks FUNCTIONAL BLOCK DIAGRAM OUTPUT LEVEL DACs OUTN OUTP VTTO 34 34 DIFFERENTIAL SWITCH MATRIX 34 34 MATRIX CONNECTION LATCHES CONNECTION DECODE OUTPUT LEVEL LATCHES CONTROL LOGIC INN VTTI INP D[5:0] A[6:0] RE WE RESET CS UPDATE VEE VCC AD8152 34 34 GENERAL DESCRIPTION AD8152 is a member of the Xstream line of products and is a breakthrough in digital switching, offering a large switch array (34 × 34) on very little power, typically 2.0 W. Additionally, it operates at data rates up to 3.2 Gbps per port, making it suitable for Sonet/SDH OC-48 with Forward Error Correction (FEC). The AD8152’s useful supply voltage range allows the user to operate at LVPECL/CML data levels down to 2.5 V. The control interface is LVTTL or LVCMOS compatible on 2.5 V to 3.3 V. The AD8152’s fully differential signal path reduces jitter and crosstalk while allowing the use of smaller single-ended voltage swings. It is offered in a 256-ball SBGA package that operates over the industrial temperature range of 0 °C to 85°C. 80ps/DIV Figure 1. Eye Pattern, 3.2 Gbps, PRBS 23 |
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