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E-L6258EP Datasheet(PDF) 4 Page - STMicroelectronics |
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E-L6258EP Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 22 page L6258EP 4/22 Table 4. Electrical Characteristics (VS = 40V; VDD = 5V; Tj = 25°; unless otherwise specified.) Note 1: This is true for all the logic inputs except the disable input. (*) Chopping frequency is twice fosc value. Symbol Parameter Test Condition Min. Typ. Max. Unit VS Supply Voltage 12 40 V VDD Logic Supply Voltage 4.75 5.25 V VBOOT Storage Voltage VS = 12 to 40V VS+6 VS+12 V VSense Max Drop Across Sense Resistor 1.25 V VS(off) Power off Reset Off Threshold 6 7.2 V VDD(off) Power off Reset Off Threshold 3.3 4.1 V IS(on) VS Quiescent Current Both bridges ON, No Load 15 mA IS(off) VS Quiescent Current Both bridges OFF 7 mA IDD VDD Operative Current 15 mA ∆TSD-H Shut Down Hysteresis 25 °C TSD Thermal shutdown 150 °C fosc Triangular Oscillator Frequency (*) CFREF = 1nF 12.5 15 18.5 KHz TRANSISTORS IDSS Leakage Current OFF State 500 µA Rds(on) On Resistance ON State 0.6 0.75 Ω Vf Flywheel diode Voltage If =1.0A 1 1.4 V CONTROL LOGIC Vin(H) lnput Voltage All Inputs 2 VDD V Vin(L) Input Voltage All Inputs 0 0.8 V Iin Input Current (Note 1) 0 < Vin < 5V -150 +10 µA Idis Disable Pin Input Current -10 +150 µA Vref1/ref2 Reference Voltage operating 0 2.5 V Iref Vref Terminal Input Current Vref = 1.25 -2 5 µA FI = Vref/Vsense PWM Loop Transfer Ratio 2 VFS DAC Full Scale Precision Vref = 2.5V I0/I1/I2/I3 = L 1.23 1.34 V Voffset Current Loop Offset Vref = 2.5V I0/I1/I2/I3 = H -40 +40 mV DAC Factor Ratio Normalized @ Full scale Value -2 +2 % SENSE AMPLIFIER Vcm lnput Common Mode Voltage Range -0.7 VS+0.7 V Iinp Input Bias sense1/sense2 -200 0 µA ERROR AMPLIFIER GV Open Loop Voltage Gain 70 dB SR Output Slew Rate Open Loop 0.2 V/ µs GBW Gain Bandwidth Product 400 kHz |
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