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CS4614-CM Datasheet(PDF) 10 Page - Cirrus Logic |
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CS4614-CM Datasheet(HTML) 10 Page - Cirrus Logic |
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10 / 24 page  10 CIRRUS LOGIC PRELIMINARY PRODUCT BULLETIN JUNE 30, 5:03 PM DS292PP3 CS4614 CrystalClear™ SoundFusion™ PCI Audio Accelerator management. This implementation improves sys- tem efficiency by minimizing the number of host interrupts. The CS4614 supports a variety of audio I/O config- urations including a CS4297 CrystalClear AC ’97 Codec. The system’s flexibility is further enhanced by the inclusion of a bi-directional serial MIDI port, a joystick port, a hardware volume control in- terface, and a serial data port which allows connec- tion of an optional external EEPROM device. Stream Processor DSP Core The CS4614 Stream Processor (SP) is a custom DSP core design which is optimized for processing and synthesizing digital audio data streams. The SP features a Somewhat Long Instruction Multiple Data (SLIMD) modified dual Harvard architecture. The device uses a 40-bit instruction word and oper- ates on 32-bit data words. The SP includes two Multiply-Accumulate (MAC) blocks and one 16- bit Arithmetic and Logic Unit (ALU). The SP core is conservatively rated at 255 Million Instructions per second (255 MIPS) when running at a 85 MHz internal clock speed. The MAC units perform dual 20-bit by 16-bit multiplies and have 40-bit accumu- lators, providing higher quality than typical 16-bit DSP architectures. A programmable Phase Locked Loop (PLL) circuit generates the high frequency internal SP clock from a lower frequency input clock. The input to the PLL may be from a crystal oscillator circuit or the serial port clock ABITCLK/SCLK. Clock con- trol circuitry allows gating of clocks to various in- ternal functional blocks to conserve power during power conservation modes, as well as during nor- mal modes of operation when no tasks are being executed. Legacy Support Legacy games are supported by CrystalClear Leg- acy Support (CCLS), DDMA, or by the PC/PCI in- terface. In both motherboard and add-in card designs, CCLS and DDMA provide support for legacy games by providing a hardware interface that sup- ports a Sound Blaster Pro compatible interface, as well as support for FM, MPU-401, and joystick in- terfaces. These hardware interfaces provide PCI- only games compatibility for real-mode DOS and Windows DOS-box support. For motherboard designs, PC/PCI can be used by connecting the PCGNT# and PCREQ# pins to the appropriate pins on the south bridge motherboard chip. The PC/PCI interface is compliant with In- tel’s PC/PCI spec. (version 1.2). The BIOS must enable the PC/PCI mechanism at boot time on both the CS4614 and the south bridge. SYSTEM ARCHITECTURES A typical system diagram depicting connection of the CS4614 to the CrystalClear CS4297 AC ’97 Codec is given in Figure 7. All analog audio inputs and outputs are connected to the CS4297. Audio data is passed between the CS4297 and the CS4614 over the serial AC-Link. The CS4614 provides a hardware interface for connection of a joystick and MIDI devices. HOST INTERFACE The CS4614 host interface is comprised of two sep- arate interface blocks which are memory mapped into host address space. The interface blocks can be located anywhere in the host 32-bit physical ad- dress space. The interface block locations are de- fined by the addresses programmed into the two Base Address Registers in the PCI Configuration Space. These base addresses are normally set up by the system’s Plug and Play BIOS. The first inter- face block (located by Base Address 0) is a 4 kByte register block containing general purpose configu- ration, control, and status registers for the device. The second interface block (located by Base Ad- dress 1) is a 1 MByte block which maps all of the internal RAM memories (SP Program RAM, Pa- |
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