Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
KM416S1021C Datasheet(PDF) 6 Page - Samsung semiconductor |
|
KM416S1021C Datasheet(HTML) 6 Page - Samsung semiconductor |
6 / 8 page KM416S1021C REV. 1. May '98 CMOS SDRAM Preliminary AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter Symbol -7 -S -8 Unit Note Min Max Min Max Min Max CLK cycle time CAS latency=3 tCC 7 1000 - 1000 8 1000 ns 1 CAS latency=2 12 10 13 CLK to Valid Output Delay CAS latency=3 tSAC 5.5 - 6 ns 1,2 CAS latency=2 7 6 8 Output data hold time tOH 2.5 2 2.5 ns 2 CLK high pulse width tCH 3 3.5 3 ns 3 CLK low pulse width tCL 3 3.5 3 ns 3 Input setup time tSS 2 2 2.5 ns 3 Input hold time tSH 1 1 1 ns 3 CLK to output in Low-Z tSLZ 1 1 1 ns 2 CLK to output in Hi-Z CAS latency=3 tSHZ 5.5 - 6 ns CAS latency=2 7 8 8 1. Parameters depend on programmed CAS latency. 2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter. 3. Assumed input rise and fall time (tr & tf) = 1ns. If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr + tf)/2-1]ns should be added to the parameter. Notes : |
Número de pieza similar - KM416S1021C |
|
Descripción similar - KM416S1021C |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |