TC55W800XB7,8

2001-10-03

9/12

WRITE CYCLE 4 (

,

CONTROLLED)

(See Note 4)

Note:

(1)

R/W remains HIGH for the read cycle.

(2)

If CE1 goes LOW(or CE2 goes HIGH) coincident with or after R/W goes LOW, the outputs will remain

at high impedance.

(3)

If CE1 goes HIGH(or CE2 goes LOW) coincident with or before R/W goes HIGH, the outputs will

remain at high impedance.

(4)

If OE is HIGH during the write cycle, the outputs will remain at high impedance.

(5)

Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be

applied.

UB LB

R/W

1

CE

VALID DATA IN

Hi-Z

Hi-Z

CE2

UB

, LB

(See Note 5)

Address

A0~A18

I/O1~16

I/O1~16