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TDA7269SA Datasheet(PDF) 5 Page - STMicroelectronics |
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TDA7269SA Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 11 page 5/11 TDA7269SA Figure 6. Test and Application Circuit (Stereo Configuration) 4 APPLICATION SUGGESTIONS 4.1 (Demo Board Schematic) The recommended values of the external components are those shown the demoboard schematic different val- ues can be used, the following table can help the designer Table 5. . (*) Closed loop gain has to be ≥25dB COMPONENT SUGGESTION VALUE PURPOSE LARGER THAN RECOMMENDED VALUE SMALLER THAN RECOMMENDED VALUE R1 10K Ω Mute Circuit Increase of Dz Biasing Current R2 15K Ω Mute Circuit Vpin #5 Shifted Downward Vpin #5 Shifted Upward R3 18K Ω Mute Circuit Vpin #5 Shifted Upward Vpin #5 Shifted Downward R4 15K Ω Mute Circuit Vpin #5 Shifted Upward Vpin #5 Shifted Downward R5, R8 18K Ω Closed Loop Gain Setting (*) Increase of Gain R6, R9 560 Ω Decrease of Gain R7, R10 4.7 Ω Frequency Stability Danger of Oscillations Danger of Oscillations C1, C2 1 µF Input DC Decoupling Higher Low Frequency Cutoff C3 1 µF St-By/Mute Time Constant Larger On/Off Time Smaller On/Off Time C4, C6 1000 µF Supply Voltage Bypass Danger of Oscillations C5, C7 0.1 µF Supply Voltage Bypass Danger of Oscillations C8, C9 0.1 µF Frequency Stability Dz 5.1V Mute Circuit R3 IN (L) C1 R2 C3 MUTE/ ST-BY GND IN (R) C2 R7 R10 C8 C9 OUT (L) OUT (R) C6 C4 +VS 3 5 7 9 6 11 2 4 + + - - D94AU087B RL (L) RL (R) +VS -VS R9 R5 IN- (L) 8 10 IN- (R) 1 SW1 R1 DZ R4 SW2 C7 R8 R6 C5 Q1 ST-BY MUTE |
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