REV. 0

ADF4212L

–5–

PIN FUNCTION DESCRIPTION

Mnemonic

Description

RF Charge Pump Output. When enabled, this provides

external RF VCO.

Digital Ground Pin for the RF Digital Circuitry

Input to the RF Prescaler. This small signal input is normally ac-coupled from the RF VCO.

Ground Pin for the RF Analog Circuitry

Multiplexed Output of RF/IF Programmable or Reference Dividers, RF/IF Fastlock Mode. CMOS output.

Ω.

See Figure 2. This input can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.

Digital Ground Pin for the IF Digital, Interface, and Control Circuitry

MUXOUT

This multiplexer output allows either the IF/RF Lock Detect, the scaled RF, scaled IF, or the scaled Reference Frequency

to be accessed externally.

CLK

Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into

the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.

DATA

Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is a high

impedance CMOS input.

LE

Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the four

latches, the latch being selected using the control bits.

Connecting a resistor between this pin and ground sets the maximum RF and IF charge pump output current. The

I

R

CP MAX

SET

=

13 5

.

Ground Pin for the IF Analog Circuitry

Input to the IF Prescaler. This small signal input is normally ac-coupled from the IF VCO.

Output from the IF Charge Pump. This is normally connected to a loop filter that drives the input to an external VCO.

it can be set to 5.5 V and used to drive a VCO with a tuning range up to 5.5 V.

it can be set to 5.5 V and used to drive a VCO with a tuning range up to 5.5 V.