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AM7945JC Datasheet(PDF) 10 Page - Advanced Micro Devices |
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AM7945JC Datasheet(HTML) 10 Page - Advanced Micro Devices |
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10 / 18 page  10 Am7945 Data Sheet SWITCHING WAVEFORMS Notes: 1. Unless otherwise noted, test conditions are VCC = +5 V, VEE = –5 V, CHP = 0.33 µF, RDC1 = RDC2 = 9.26 kΩ, CDC = 0.33 µF, RD = 35.4 kΩ, CCAS = 0.33 µF, no fuse resistors, BAT = –48 V, RL = 900 Ω, and RTMG = 1700 Ω. 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5% 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz with a termination impedance of 900 Ω and an R L of 600 Ω in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only. 7. Assumes the following ZT networks: 8. Group delay can be considerably reduced by using a ZT network such as that shown in Note 7 above. The network reduces the group delay to less than 2 µs. The effect of group delay on the linecard performance may be compensated for by using the QSLAC™ or DSLAC™ device. DET tgkde DET tshdd Note: All delays measured at 1.4 V level. E1 E1 E0 E1 to DET E0 to DET tshde tgkde tshde tshd0 tgkdd tgkd0 VTX RSN 90 k Ω 150 pF 90 k Ω (900 Ω): VTX RSN 60 k Ω 150 pF 60 k Ω (600 Ω): |
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