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AD5535 Datasheet(PDF) 5 Page - Analog Devices |
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AD5535 Datasheet(HTML) 5 Page - Analog Devices |
5 / 16 page Preliminary Technical Data AD5535 Rev. PrE | Page 5 of 16 TIMING CHARACTERISTICS VPP = 210 V, V− = –5 V, V+ = +5 V; AVCC = 5.25 V; DVCC = 2.7 V to 5.25 V; AGND = DGND = DAC_GND = 0 V; REF_IN = 4.096 V. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter1, 2, 3 A Grade Unit Conditions/Comments fUPDATE 1.2 MHz max Channel Update Rate fCLKIN 30 MHz max SCLK Frequency t1 13 ns min SCLK High Pulse Width t2 13 ns min SCLK Low Pulse Width t3 15 ns min SYNC Falling Edge to SCLK Falling Edge Setup Time t4 50 ns min SYNC Low Time t5 10 ns min SYNC High Time t6 10 ns min DIN Setup Time t7 5 ns min DIN Hold Time t8 200 ns min 19th SCLK Falling Edge to SYNC Falling Edge for Next Write t9 20 ns min RESET Pulse Width 1 See timing diagrams in Figure 2. 2 Guaranteed by design and characterization, not production tested. 3 All input signals are specified with tr = tf = 5 ns (10% to 90% of DVCC) and timed from a voltage level of (VIL + VIH)/2. 1 LSB 16 17 18 19 MSB 1 RESET 2 34 5 t8 t7 t6 t4 t9 DIN SYNC SCLK t5 t3 t2 t1 Figure 2. Serial Interface Timing Diagram |
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