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GS881E32BGT-150 Datasheet(PDF) 5 Page - GSI Technology |
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GS881E32BGT-150 Datasheet(HTML) 5 Page - GSI Technology |
5 / 40 page GS881E18B(T/D)/GS881E32B(T/D)/GS881E36B(T/D) Rev: 1.04 3/2005 5/40 © 2002, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. TQFP Pin Description Symbol Type Description A0, A1 I Address field LSBs and Address Counter preset Inputs A I Address Inputs DQA DQB DQC DQD I/O Data Input and Output pins NC — No Connect BW IByte Write—Writes all enabled bytes; active low BA, BB, BC, BD I Byte Write Enable for DQ Data I/Os; active low NC — No Connect CK I Clock Input Signal; active high GW I Global Write Enable—Writes all bytes; active low E2 I Chip Enable; active high E1 I Chip Enable; active low G I Output Enable; active low ADV I Burst address counter advance enable; active low ADSP, ADSC I Address Strobe (Processor, Cache Controller); active low ZZ I Sleep Mode control; active high LBO I Linear Burst Order mode; active low VDD I Core power supply VSS I I/O and Core Ground VDDQ I Output driver power supply |
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