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GS8160EV18AT-300I Datasheet(PDF) 11 Page - GSI Technology

No. de pieza GS8160EV18AT-300I
Descripción Electrónicos  1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
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Fabricante Electrónico  GSI [GSI Technology]
Página de inicio  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8160EV18AT-300I Datasheet(HTML) 11 Page - GSI Technology

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Rev: 1.00a 6/2003
11/24
© 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8160EV18/32/36AT-350/333/300/250/225/200/150
Preliminary
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
WR
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Simplified State Diagram with G
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.


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