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GS8170LW36AGC-350I Datasheet(PDF) 7 Page - GSI Technology

No. de pieza GS8170LW36AGC-350I
Descripción Electrónicos  18Mb 誇1x1Lp CMOS I/O Late Write SigmaRAM
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Fabricante Electrónico  GSI [GSI Technology]
Página de inicio  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8170LW36AGC-350I Datasheet(HTML) 7 Page - GSI Technology

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GS8170LW36/72AC-350/333/300/250
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
7/32
© 2003, GSI Technology
Two Byte Write Control Example with Late Write SigmaRAM
Special Functions
Burst Cycles
SRAMs provide an on-chip burst address generator that can be utilized, if desired, to simplify burst read or write implementations.
The ADV control pin, when driven high, commands the SRAM to advance the internal address counter and use the counter
generated address to read or write the SRAM. The starting address for the first cycle in a burst cycle series is loaded into the SRAM
by driving the ADV pin low, into Load mode.
DA
DB
DE
DA
DC
F
/E1
Write
BC
D
ADV
ADV
Non-Write
Write
Write
CK
Address
A
E
Write
CQ
/BA
/BB
DQA0-DQA8
DQB0-DQB8


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