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74ABT652A Datasheet(PDF) 1 Page - NXP Semiconductors |
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74ABT652A Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 8 page Philips Semiconductors Product specification 74ABT652A Octal transceiver/register, non-inverting (3-State) 1 1995 Apr 19 853-1614 15144 FEATURES • Independent registers for A and B buses • Multiplexed real-time and stored data • 3-State outputs • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The 74ABT652A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT652A transceiver/register consists of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay CPBA to An or CPAB to Bn CL = 50pF; VCC = 5V 3.7 4.3 ns CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 110 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 24-pin plastic DIP –40 °C to +85°C 74ABT652AN SOT222-1 24-pin plastic SOL –40 °C to +85°C 74ABT652AD SOT137-1 24-pin plastic SSOP Type II –40 °C to +85°C 74ABT652ADB SOT340-1 24-pin plastic TSSOP Type I –40 °C to +85°C 74ABT652APW SOT355-1 PIN CONFIGURATION SA00094 CPAB SAB OEAB A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 11 12 VCC CPBA SBA OEBA B0 B1 B2 B3 B4 B5 B6 B7 13 14 15 16 17 18 19 20 21 22 23 24 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1, 23 CPAB / CPBA A to B clock input / B to A clock input 2, 22 SAB / SBA A to B select input / B to A select input 3, 21 OEAB / OEBA A to B Output Enable input / B to A Output Enable input (active–Low) 4, 5, 6, 7, 8, 9, 10, 11 A0 – A7 Data inputs/outputs (A side) 20, 19, 18, 17, 16, 15, 14, 13 B0 – B7 Data inputs/outputs (B side) 12 GND Ground (0V) 24 VCC Positive supply voltage |
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