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74ALS112AD Datasheet(PDF) 6 Page - NXP Semiconductors |
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74ALS112AD Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 10 page Philips Semiconductors Product specification 74ALS112A Dual J-K negative edge-triggered flip-flop 1996 Jun 27 6 AC WAVEFORMS For all waveforms, VM = 1.3V. The sahded areas indicate when the input is permitted to change for predictable output performance. VM VM CPn VM VM VM VM VM VM tsu(H) th(H) Jn, Kn Qn VM tw(L) 1/fmax tsu(L) th(L) VM VM tPLH Qn tw(H) tPHL tPHL tPLH SC00136 Waveform 1. Propagation Delay for Data to Output, Data Setup Time and Hold Times, Clock Pulse Width, and Maximum Clock Frequency VM CPn Qn VM VM Qn tPHL tPLH SDn VM VM tw(L) SC00049 Jn, Kn tREC Waveform 2. Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock VM CPn Qn VM VM Qn tPLH tPHL RDn VM VM tw(L) SC00050 Jn, Kn tREC Waveform 3. Propagation Delay for Reset to Output, Reset Pulse Width, and Recovery Time for Reset to Clock |
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