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ADXL210E Datasheet(PDF) 10 Page - Analog Devices |
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ADXL210E Datasheet(HTML) 10 Page - Analog Devices |
10 / 12 page REV. 0 ADXL210E –10– With the single pole roll-off characteristic, the typical noise of the ADXL210E is determined by the following equation: Noise rms Hz BW () = ()×× () 200 1 6 µg/ . At 100 Hz the noise will be: Noise rms Hz m () = ()×× () = 200 100 1 6 2 53 µgg /. . Often the peak value of the noise is desired. Peak-to-peak noise can only be estimated by statistical methods. Table III is useful for estimating the probabilities of exceeding various peak values, given the rms value. Table III. Estimation of Peak-to-Peak Noise % of Time that Noise Nominal Peak-to-Peak Will Exceed Nominal Value Peak-to-Peak Value 2.0 × rms 32% 4.0 × rms 4.6% 6.0 × rms 0.27% 8.0 × rms 0.006% The peak-to-peak noise value will give the best estimate of the uncertainty in a single measurement. Table IV gives typical noise output of the ADXL210E for various CX and CY values. Table IV. Filter Capacitor Selection, CX and CY Peak-to-Peak Noise Estimate 95% Bandwidth CX, CY rms Noise Probability (rms 4) 10 Hz 0.47 µF 0.8 mg 3.2 mg 50 Hz 0.10 µF 1.8 mg 7.2 mg 100 Hz 0.05 µF 2.5 mg 10.1 mg 200 Hz 0.027 µF 3.6 mg 14.3 mg 500 Hz 0.01 µF 5.7 mg 22.6 mg CHOOSING T2 AND COUNTER FREQUENCY: DESIGN TRADE-OFFS The noise level is one determinant of accelerometer resolution. The second relates to the measurement resolution of the counter when decoding the duty cycle output. The ADXL210E’s duty cycle converter has a resolution of approximately 14 bits; better resolution than the accelerometer itself. The actual resolution of the acceleration signal is, how- ever, limited by the time resolution of the counting devices used to decode the duty cycle. The faster the counter clock, the higher the resolution of the duty cycle and the shorter the T2 period can be for a given resolution. The following table shows some of the trade-offs. It is important to note that this is the resolution due to the microprocessors’ counter. It is probable that the accelerometer’s noise floor may set the lower limit on the resolu- tion, as discussed in the previous section. MICROCOMPUTER INTERFACES The ADXL210E is specifically designed to work with low-cost microcontrollers. Specific code sets, reference designs, and applica- tion notes are available from the factory. This section will outline a general design procedure and discuss the various trade-offs that need to be considered. The designer should have some idea of the required performance of the system in terms of: Resolution: the smallest signal change that needs to be detected. Bandwidth: the highest frequency that needs to be detected. Acquisition Time: the time that will be available to acquire the signal on each axis. These requirements will help to determine the accelerometer band- width, the speed of the microcontroller clock and the length of the T2 period. When selecting a microcontroller it is helpful to have a counter timer port available. The microcontroller should have provisions for software calibration. While the ADXL210E is a highly accurate accelerometer, it has a wide tolerance for initial offset. The easiest way to null this offset is with a calibration factor saved on the microcontroller or by a user calibration for zero g. In the case where the offset is calibrated during manufacture, there are several options, including external EEPROM and microcontrol- lers with “one-time programmable” features. DESIGN TRADE-OFFS FOR SELECTING FILTER CHARACTERISTICS: THE NOISE/BW TRADE-OFF The accelerometer bandwidth selected will determine the measure- ment resolution (smallest detectable acceleration). Filtering can be used to lower the noise floor and improve the resolution of the accelerometer. Resolution is dependent on both the analog filter bandwidth at XFILT and YFILT and on the speed of the micro- controller counter. The analog output of the ADXL210E has a typical bandwidth of 5 kHz, while the duty cycle modulators’ bandwidth is 500 Hz. The user must filter the signal at this point to limit aliasing errors. To minimize DCM errors the analog bandwidth should be less than one-tenth the DCM frequency. Analog bandwidth may be increased to up to half the DCM frequency in many applications. This will result in greater dynamic error generated at the DCM. The analog bandwidth may be further decreased to reduce noise and improve resolution. The ADXL210E noise has the character- istics of white Gaussian noise that contributes equally at all frequencies and is described in terms of µg per root Hz; i.e., the noise is proportional to the square root of the bandwidth of the accelerometer. It is recommended that the user limit bandwidth to the lowest frequency needed by the application to maximize the resolution and dynamic range of the accelerometer. |
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