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74ALVCH16244DGG Datasheet(PDF) 7 Page - NXP Semiconductors |
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74ALVCH16244DGG Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 10 page Philips Semiconductors Product specification 74ALVC16244/ 74ALVCH16244 16-bit buffer/line driver (3-State) 1998 Jun 29 7 AC WAVEFORMS FOR VCC = 2.3V TO 2.7V AND VCC < 2.3V RANGE VM = 0.5 VCC VX = VOL + 0.15V VY = VOH –0.15V VOL and VOH are the typical output voltage drop that occur with the output load. V I = VCC AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND VCC = 2.7V RANGE VM = 1.5 V VX = VOL + 0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drop that occur with the output load. V I = 2.7V SW00057 An INPUT VM tPHL tPLH VOL VI VM GND VOH Yn OUTPUT Waveform 1. Input (An) to output (Yn) propagation delay times tPLZ tPZL VI nOE INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SW00058 Waveform 2. 3-State enable and disable times TEST CIRCUIT SWITCH POSITION PULSE GENERATOR RT VI D.U.T. VO CL VCC RL = 500 Ω Test Circuit for switching times Open GND S1 DEFINITIONS VCC VI < 2.7V VCC TEST S1 tPLH/tPHL Open RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. 2 < VCC tPLZ/tPZL 2.7V 2.7–3.6V tPHZ/tPZH GND RL = 500 Ω 2 * VCC SV00906 Waveform 3. Load circuitry for switching times |
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