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74F845 Datasheet(PDF) 10 Page - NXP Semiconductors |
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74F845 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 18 page Philips Semiconductors Product specification 74F841/74F842/74F843/ 74F845/74F846 Bus interface latches 1999 Jun 23 10 DC ELECTRICAL CHARACTERISTICS Over recommended operating free-air temperature range unless otherwise noted. SYMBOL PARAMETER TEST CONDITIONS1 LIMITS UNIT SYMBOL PARAMETER TEST CONDITIONS1 MIN TYP2 MAX UNIT IO = 15mA ±10%VCC 2.2 V VO High level output voltage VCC = MIN, IOH = –15mA ±5%VCC 2.2 3.3 V VOH High-level output voltage CC , VIL = MAX, VIH = MIN IO = 24mA ±10%VCC 2.0 V IOH = –24mA ±5%VCC 2.0 V VO Low level output voltage VCC = MIN, IOL = 32mA ±10%VCC 0.38 0.55 V VOL Low-level output voltage CC , VIL = MAX, VIH = MIN IOL = 48mA ±5%VCC 0.38 0.55 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V II Input current at maximum input voltage VCC = 0.0V, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –20 µA IOZH Off-state output current, High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current, Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output current3 VCC = MAX –100 –225 mA ICCH 50 65 mA 74F841 ICCL VCC = MAX 60 80 mA ICCZ 70 92 mA ICCH 40 60 mA 74F842 ICCL VCC = MAX 65 90 mA ICC Supply current ICCZ 60 90 mA ICC y (total) ICCH 65 90 mA 74F843 74F845 ICCL VCC = MAX 75 100 mA 74F845 ICCZ 85 115 mA ICCH 50 70 mA 74F846 ICCL VCC = MAX 70 95 mA ICCZ 70 95 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter test, IOS tests should be performed last. |
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