SI4728CY datasheet(3/9 Pages) VISHAY

No. de pieza	SI4728CY

Descripción Electrónicos	N-Channel Synchronous MOSFETs with Break-Before-Make

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Fabricante Electrónico	VISHAY [Vishay Siliconix]

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Si4728CY

Vishay Siliconix

Document Number: 71286

S-03075—Rev. C, 03-Feb-03

www.vishay.com

3

SPECIFICATIONS

Test Conditions Unless Specified

Limits

Parameter

Symbol

TJ = 25_C

4.5 V < VDD < 5.5 V, 4.5 V < VD1 < 30 V

Min

Typ

Max

Unit

Power Supplies

Logic Voltage

VDD

4.5

5.5

V

IDD(EN)

VDD = 4.5 V, VIN = 4.5 V

280

500

m

Logic Current

IDD(DIS)

VDD = 4.5 V, VIN = 0 V

220

500

mA

Logic Input

High

VIH

3.15

2.3

Logic Input Voltage (VIN)

Low

VIL

VDD = 4.5 V

- 0.3

2.25

0.8

V

Protection

Break-Before-Make Reference

VBBM

VDD = 5.5 V

2.4

Undervoltage Lockout

VUVLO

SYNC = 4.5 V

3.75

4

4.25

V

Undervoltage Lockout Hysteresis

VH

0.4

MOSFET Drivers

RDR1

Driver 1

3.6

W

Driver Impedance

RDR2

VDD = 4.5 V

Driver 2

2

W

MOSFETs

Drain-Source Voltage

VDS

ID = 250 mA

30

V

rDS(on)1

VDD = 4.5 V, ID = 10 A

Q1

13

18

W

Drain-Source On-State Resistancea

rDS(on)2

VDD = 4.5 V, ID = 10 A

TJ = 25_C

Q2

8

10.5

m

W

VSD1

Q1

0.7

1.1

Diode Forward Voltagea

VSD2

IS = 2 A, VGS = 0 V

Q2

0.7

1.1

V

Dynamicb (Unless Specified—Fs = 250 kHz, dc = 10%. VDD = 5 V, I = 10 A, Refer to Switching Test Setup)

trdr1

Driver 1

31

60

Rise Time

trdr2

10% - 90%

Driver 2

23

40

tfdr1

Driver 1

9

20

Fall Time

tfdr2

90% - 10%

Driver 2

15

40

td(off)1

VIN to G1

50

100

Turn-Off Delay

td(off)2

VIN to G2

27

60

ns

D

Dt1-2

See Timing Diagram

G1 to G2

19

40

ns

Dt

Dt2-1

G2 to G1

38

80

Rise Time

tr

10% - 90%

S1/D2

29

60

Fall Time

tf

90% - 10%

S1/D2

10

20

Source-Drain Reverse Recovery

Time—Q2

tfr2

IF 2.7 A, di/dt = 100 A/ms

50

80

Notes

a.

Pulse test: pulse width

v300 ms; duty cycle v 2%.

b.

Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

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