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FIN224AC Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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FIN224AC Datasheet(HTML) 10 Page - Fairchild Semiconductor |
10 / 23 page ©2006 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com FIN224AC Rev. 1.0.7 Application Mode Diagrams Unidirectional Data Transfer Figure 14 shows a half duplex connectivity diagram with FIN224AC, which has similar functionality as FIN24AC. This connectivity allows for two unidirectional data streams to be sent across a single pair of SerDes. Data is sent on a frame-by-frame basis. For this mode of oper- ation, there needs to be some synchronization between when the camera sends its data frame and when the LCD sends its data. One option is to have the LCD send data during the camera blanking period. External logic is needed for this mode of operation. Devices alternate frames of data controlled by a direction control and a direction sense. When DIRI, on the right- hand FIN224AC is HIGH, data is sent from the camera to the camera interface at the base. When DIRI, on the right-hand FIN224AC, goes LOW, data is sent from the baseband process to the LCD. The direction is then changed at DIRO on the right-hand FIN224AC indicating to the left-hand FIN224AC to change direction. Data is sent from the base LCD unit to the LCD. The DIRO pin on the left-hand FIN24AC is used to indicate to the base control unit that the signals are changing direction and the LCD is available to be sent data. DIRI on the right- hand FIN224AC could typically use a timing reference signal, such as VSYNC from the camera interface, to indicate direction change. A derivative of this signal may be required to make sure that no data is lost in the final data transfer. Figure 12. FIN224AC RGB 2.8V 2.8V VDDP 2.8V 1.8V LCD_VSYNC_S LCD14_M LCD10_M LCD2_M LCD6_M LCD8_M LCD12_M LCD4_M LCD1_M LCD15_M LCD5_M LCD11_M LCD3_M LCD9_M LCD7_M LCD13_M PIXCLK_M LCD_HSYNC_M LCD_VSYNC_M LCD17_M LCD0_S LCD1_S LCD0_M LCD2_S LCD3_S LCD4_S LCD5_S PIXCLK_S GPIO_MODE LCD6_S LCD7_S LCD8_S LCD9_S LCD10_S LCD11_S LCD12_S LCD13_S LCD14_S LCD15_S LCD_HSYNC_S LCD16_S LCD17_S LCD16_M LCD_ENABLE_M LCD_ENABLE_S µSerDes DeSerializer LCD Controller Out Assumptions: 1) 18-bit Unidirectional RGB Application 2) Mode 3 Operation (10 Mhz to 20Mhz CKREF) LCD Display In 3) VDDP = (1.65V to 3.6V) µSerDes Serializer C11 2.2uF C11 2.2µF 1nF C10 1nF C10 TP5 TP5 .01uF C3 .01µF C3 1nF C6 1nF C6 U22 FIN224AC U22 FIN224AC DP9 A1 DP7 A2 DP5 A3 DP3 A4 DP1 A5 CKREF A6 DP11 B1 DP10 B2 DP6 B3 DP2 B4 STROBE B5 DIRO B6 CKP C1 DP12 C2 DP8 C3 DP4 C4 CKSO+ C5 CKSO- C6 DP13 D1 DP14 D2 VDDP D3 DSO-/DSI+ D5 DSO+/DSI- D6 CKSI- E6 CKSI+ E5 VDDS E4 DP16 E2 DP15 E1 DIRI F6 S2 F5 VDDA F4 DP21 F3 DP18 F2 DP17 F1 S1 J6 DP24 J5 DP23 J4 DP22 J3 DP20 J2 DP19 J1 TP6 TP6 U20 FIN224AC U20 FIN224AC DP9 A1 DP7 A2 DP5 A3 DP3 A4 DP1 A5 CKREF A6 DP11 B1 DP10 B2 DP6 B3 DP2 B4 STROBE B5 DIRO B6 CKP C1 DP12 C2 DP8 C3 DP4 C4 CKSO+ C5 CKSO- C6 DP13 D1 DP14 D2 VDDP D3 DSO-/DSI+ D5 DSO+/DSI- D6 CKSI- E6 CKSI+ E5 VDDS E4 DP16 E2 DP15 E1 DIRI F6 S2 F5 VDDA F4 DP21 F3 DP18 F2 DP17 F1 S1 J6 DP24 J5 DP23 J4 DP22 J3 DP20 J2 DP19 J1 .01uF C12 .01µF C12 |
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Descripción similar - FIN224AC |
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