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74LV259PW Datasheet(PDF) 6 Page - NXP Semiconductors |
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74LV259PW Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 14 page Philips Semiconductors Product specification 74LV259 8-bit addressable latch 1998 May 20 6 DC ELECTRICAL CHARACTERISTICS (Continued) Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS -40 °C to +85°C -40 °C to +125°C UNIT MIN TYP1 MAX MIN MAX II Input leakage current VCC = 3.6 V; VI = VCC or GND 1.0 1.0 µA ICC Quiescent supply current; MSI VCC = 3.6 V; VI = VCC or GND; IO = 0 20.0 160 µA ∆ICC Additional quiescent supply current per input VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V 500 850 µA NOTE: 1. All typical values are measured at Tamb = 25°C. AC CHARACTERISTICS GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ CONDITION LIMITS SYMBOL PARAMETER WAVEFORM CONDITION –40 to +85 °C –40 to +125 °C UNIT VCC(V) MIN TYP1 MAX MIN MAX 1.2 105 t /t Propagation delay Figure 2 2.0 36 49 61 ns tPHL/tPLH gy D to Qn Figure 2 2.7 26 36 45 ns 3.0 to 3.6 202 29 36 1.2 105 t /t Propagation delay Figure 3 2.0 36 49 61 ns tPHL/tPLH gy An to Qn Figure 3 2.7 26 36 45 ns 3.0 to 3.6 202 29 36 1.2 100 t /t Propagation delay Figure 1 2.0 34 48 60 ns tPHL/tPLH gy LE to Qn Figure 1 2.7 25 35 44 ns 3.0 to 3.6 192 28 35 1.2 90 t Propagation delay Figure 4 2.0 31 43 53 ns tPHL gy MR to Qn Figure 4 2.7 23 31 39 ns 3.0 to 3.6 172 25 31 LE lidth 2.0 34 10 41 tw LE pulse width HIGH or LOW Figure 1 2.7 25 8 30 ns HIGH or LOW 3.0 to 3.6 20 62 24 MR lidth 2.0 34 10 41 tw MR pulse width LOW Figure 4 2.7 25 8 30 ns LOW 3.0 to 3.6 20 62 24 1.2 35 t Set-up time Figure 5 and 6 2.0 24 12 29 ns tsu D, An to LE Figure 5 and 6 2.7 18 9 21 ns 3.0 to 3.6 14 72 17 1.2 –30 t Hold time Figure 5 2.0 5 –10 5 ns th D to LE Figure 5 2.7 5 –8 5 ns 3.0 to 3.6 5 –62 5 |
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