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74LVC244A Datasheet(PDF) 2 Page - NXP Semiconductors

No. de pieza 74LVC244A
Descripción Electrónicos  Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle
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Fabricante Electrónico  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC244A Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC244A
74LVCH244A
Octal buffer/line driver with 5-volt
tolerant inputs/outputs (3-State)
2
1998 May 20
853-1876 19419
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
Supply voltage range of 2.7V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
High impedance when V
CC = 0V
Bushold on all data inputs (74LVCH244A only)
DESCRIPTION
The 74LVC244A/74LVCH244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. These features allow the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC244A/74LVCH244A is an octal non-inverting buffer/line
driver with 3-State outputs. The 3-State outputs are controlled by the
output enable inputs 1OE and 2OE. A HIGH on nOE causes the
outputs to assume a high impedance OFF-state. Schmitt-trigger
action at all inputs makes the circuit highly tolerant for slower input
rise and fall times.
The ’244’ is functionally identical to the ’240’, but the ’240’ has
non-inverting outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
/t
Propagation delay
1A to 1Y
CL = 50pF
VCC =3 3V
35
ns
tPHL/tPLH
1An to 1Yn;
2An to 2Yn
VCC = 3.3V
3.5
ns
CI
Input capacitance
4.4
pF
CPD
Power dissipation capacitance per
buffer
Notes 1 and 2
22.6
pF
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in mW):
PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL x VCC2 x fo) = sum of outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
TEMPERATURE
RANGE
OUTSIDE
NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic Shrink Small Outline (SO)
–40
°C to +85°C
74LVC244A D
74LVC244A D
SOT163-1
20-Pin Plastic Shrink Small Outline (SSOP) Type II
–40
°C to +85°C
74LVC244A DB
74LVC244A DB
SOT339-1
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
–40
°C to +85°C
74LVC244A PW
7LVC244APW DH
SOT360-1
20-Pin Plastic Shrink Small Outline (SO)
–40
°C to +85°C
74LVCH244A D
74LVCH244A D
SOT163-1
20-Pin Plastic Shrink Small Outline (SSOP) Type II
–40
°C to +85°C
74LVCH244A DB
74LVCH244A DB
SOT339-1
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
–40
°C to +85°C
74LVCH244A PW
LVCH244APW DH
SOT360-1


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