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74LVC543AD Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC543AD Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 12 page Philips Semiconductors Product specification 74LVC543A Octal D-type registered transceiver (3-State) 1998 Jul 31 3 PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 LEBA OEBA A0 A1 A2 A3 A4 A5 A6 A7 EBA VCC EAB B0 B1 B2 B3 B4 B6 B5 B7 LEAB OEAB GND SW00212 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 LEBA ’B’ to ’A’ latch enable input (active LOW) 2 OEBA ’B’ to ’A’ output enable input (active LOW) 3,4,5,6, 7, 8, 9 10 A0 to A7 ’A’ data inputs/outputs 11 EBA ’B’ to ’A’ enable input (active LOW) 12 GND ground (0V) 22, 21, 20, 19, 18, 17, 16, 15 B0 to B7 ’B’ data inputs/outputs 13 OEAB ’A’ to ’B’ output enable input (active LOW) 14 LEAB ’A’ to ’B’ latch enable input (active LOW) 23 EAB ’A’ to ’B’ enable input (active LOW) 24 VCC positive supply voltage LOGIC SYMBOL 8 9 7 10 4 5 3 6 17 16 18 15 21 20 22 19 B5 B6 B4 B7 B1 B2 B0 B3 1 14 13 11 2 23 A5 A6 A4 A7 A1 A2 A0 A3 LEBA LEAB OEAB EBA OEBA EAB SW00213 LOGIC SYMBOL (IEEE/IEC) 2EN4 13 G2 1 2C6 ∇ 3 4 ∇ 3 4 5 6 7 8 9 10 22 21 20 19 18 17 16 15 SW00214 6D 5D 1C5 G1 1EN3 2 23 11 14 |
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