TPS3513

PC POWER SUPPLY SUPERVISORS

SLVS313 – FEBRUARY 2001

5

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

FPO

3

O

Inverted fault protection output, open-drain, output stage

GND

2

Ground

IS12

5

I

12-V overcurrent protection

IS5

8

I

5-V overcurrent protection

IS33

9

I

3.3-V overcurrent protection

NC

7

No internal connection

PGI

1

I

Power-good input

PGO

14

O

Power-good output, open drain output stage

PSON

4

I

On/off control

RI

6

I

Current sense setting

VDD

13

I

Supply voltage

VS12

10

I

12-V overvoltage/undervoltage protection

VS33

11

I

3.3-V overvoltage protect/undervoltage detect

VS5

12

I

5-V overvoltage protect/undervoltage detect

detailed description

power-good and power-good delay

A PC power supply is commonly designed to provide a power-good signal, which is defined by the computer

manufacturers. PGO is a power-good signal and should be asserted high by the PC power supply to indicate

that the 5-VDC and 3.3-VDC outputs are above the undervoltage threshold limit. At this time the converter

should be able to provide enough power to assure continuous operation within the specification. Conversely,

when either the 5-VDC or the 3.3-VDC output voltages fall below the undervoltage threshold, or when main

power has been removed for a sufficiently long time so that power supply operation is no longer assured, PGO

should be deasserted to a low state.

The power-good (PGO), DC enable (PSON), and the 5-V/3.3-V supply rails are shown in Figure 3.

t2

t3

t5

t4

5-V/3.3-V

Output

PSON

PGO

On

Off

75%

10%

Figure 3. Timing of PSON and PGO

Although there is no requirement to meet specific timing parameters, the following signal timings are

recommended:

2 ms

≤ t2 ≤ 20 ms, 100 ms < t3 < 2000 ms, t4 > 1 ms, t5 ≤ 10 ms