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CS19227PBI Datasheet(PDF) 3 Page - Applied Micro Circuits Corporation |
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CS19227PBI Datasheet(HTML) 3 Page - Applied Micro Circuits Corporation |
3 / 5 page Empowering Intelligent Optical Networks 3 Product Brief RUBICON-LH 10GE & OC192/48/12/3 DW/FEC/PM and AsyncMap Device with Strong FEC Revision 1.9, March 2006 Part Number S19227PBI will be 11.1GHz. The second manner of 10GE-LAN mapping is supported in the Rubicon-LH and involves the direct mapping of the client signal into a 10.7GHz OTU-2 frame. There is no flow control to rate limit the client in this mode. AIS SUPPORT For applications in which the client signal is SONET or SDH, the Rubicon-LH can generate a SONET/SDH AIS on both the client ingress and the egress. For applications in which the client signal is G.709 compliant or for OTN regenerator applications, Line Fail and un-equipped OTN AIS is supported. For OTN edge applications, the device can be provisioned to provide either a SONET/SDH AIS or a OTN Generic AIS to the client. This facilitates convergence of the SONET/SDH and OTN functions into a single network element. ODU MAPPING ITU compliant client mapping of SONET OC192 or SDH STM-64 into the ODU-2 signals (and the corresponding 2.5G signals into an ODU-1) is supported whereby a stuff column is added to every G.709 sub-frame resulting in an ODU rate expansion of (239/237). The chip can be configured to insert the G.709 compliant stuff - byte value or to insert user data into this column. The values assigned to the stuff bytes can be defined either from a register set on chip or from an external add-drop port. Coverage of these stuff columns in the BIP calculation or in the FEC is optional and can be enabled via software. When the no-coverage option is enabled, the BIP and parity check values are calculated as if the standard stuff values were present. A direct map mode is supported for ODU-2 and ODU-1 with no stuff columns to enable mapping with a 239/238 rate expansion. Start-of-frame signals are provided at the input and output ports to enable synchronization to the ODU. LOOPBACK FUNCTIONS Near-end and far-end loopback is supported for each of the client interfaces and for the line interface. This enables line and device testing and fault isolation. Each functional block may be bypassed as required to support the application. When all blocks are bypassed, the device allows transparent pass-through of client data (assuming synchronous inputs). Key status and alarm signals are provided to outside pins to enable rapid response to failure conditions. These include but are not limited to: LOS, OOF, LOF, B1 Errors, and FEC errors. Three interrupt pins, each with a mask register are provided to enable prioritization of interrupts and timely interaction with firmware. In addition to the loopback capabilities of the device, the Rubicon- LH also employs a unique port swapping capability allowing the physical ports on the device to be interfaced to either side of the FEC encoders. With this capability a customer can use the EFEC core on either physical port of the device. This capability increases the flexibility of a single board design used in a variety of modes. FORWARD ERROR CORRECTION CAPABILITY Two FEC options are supported on the 10 Gbps line side. The Rubicon-LH can support standard RS(255,239) FEC compliant with G.709, G.975, and compatible with the AMCC Hudson device. The device can also support an enhanced FEC algorithm that is applied using the same G.709 frame structure and data rate as used in the Hudson and Niagara devices, but providing more than 2 dB of additional coding gain (*measured at a BER of 10- 15). The Rubicon-LH device will operate in a mode where both encoders and decoders are working simultaneously, allowing for a single chip transponder to operate between two networks with dif- ferent gain characteristics. LEGACY COMPATIBILITY As indicated above, the Rubicon-LH also supports operation in the G.975 mode. In this mode, the G.709 overhead processing can be inhibited and direct access to the non-framing bytes in the overhead column is provided through the pins on the device. The device can should be configured to operate in the 255,238 map- ping mode with no stuff columns inserted in the FEC payload. FOOTPRINT COMPATIBILITY In addition to the significant reuse of the Niagara register map in the Rubicon, the Rubicon will also be pin compatible with the Nia- gara device. Although the core power balls will be driven to a lower voltage (1.2V versus 1.8V), with careful board design con- siderations, the customer will be able to realize the Rubicon-LH device in sockets designed for the Niagara chip. This capability will allow the customer to use a more feature rich and lower power dissipation device in the target socket. CONTROL INTERFACE A general purpose 16-bit microprocessor interface is provided for control and monitoring. The interface supports both Intel and Motorola type microprocessors, and is capable of operating in either interrupt driven or polled-mode configurations. |
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