SN74GTL2006

13BIT GTL/GTL/GTL+ TO LVTTL TRANSLATOR

SCES619 – DECEMBER 2004

7

POST OFFICE BOX 655303

APPLICATION INFORMATION

PROCHOT L

THRMTRIP L

CPU1

1ERR_L

CPU1 1ERR_L

CPU1 THRMTRIP L

CPU1 PROCHOT L

FORCEPR_L

CPU2 SMI L

SN74GTL2006

56

W

56

W

1.5 k

W

R

2R

10BO2

10BO1

4BI

3BI

6BI

5BI

11B0

8BO

7BO2

7BO1

2BI

1BI

1AO

2AO

5A

6A

11BI

11 A

3AO

4AO

10AI1

10AI2

8AI

GND

FORCE PR_L

9BI

9AO

CPU2 PROCHOT L

NMI_L

CPU2 1ERR_L

CPU2 THRMTRIP L

CPU2 SMI L

SMI_BUFF_L

Southbridge NMI

Southbridge SMI_L

FORCEPR_L

THRMTRIP L

1ERR_L

Platform

CPU1 SMI L

CPU2

Optional Signal Line

Health

Management

CPU1 SMI L

PROCHOT L

NMI

NMI

1.5 k

W to 1.2 kW

frequently asked questions

Question 1: On SN74GTL2006 LVTTL inputs, specifically 10AI1 and 10AI2, when the device is powered down,

these inputs may be pulled up to 3.3 V, and we want to ensure that there is no leakage path to the power rail

under this condition. Are the LVTTL inputs high impedance when the device is powered down, and will there

be any leakage?

Answer 1: When the device is powered down, the LVTTL inputs are in a high-impedance state and do not leak

Question 2: Do all the LVTTL inputs have the same powered-down characteristic?

Answer 2: Yes

Question 3: What is the condition of the other GTL I/O and LVTTL output pins when the device is powered

down?

Answer 3: The open-drain outputs, both GTL and LVTTL, do not leak to the power supply if they are pulled high

while the device is powered down. The GTL inputs also do not leak to the power supply under the same

conditions. The LVTTL totem-pole outputs, however, are not open-drain type outputs, and there will be current