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LM1212N Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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LM1212N Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 18 page Circuit Description (Continued) VIDEO AMPLIFIER SECTION (Output Stage) A simplified schematic of LM1212’s video amplifier output stage is shown in Figure 4 The output stage is the second gain stage Ideally the gain of the second gain stage would be AV2 ebR21R18 eb16 Because of the output stage’s low open loop gain the gain is approximately AV2 eb10 Thus the maximum gain of the video amplifier is AV e AV1 c AV2 e 20 Transistors Q23 and Q24 provide a push-pull drive to the load The output voltage can swing from 02V to 10V Q82 is the OSD blanking transistor Its base is connected to pin 20 via R34 A high TTL signal at pin 20 turns on Q82 This forces a current flow-through R20 and R31 These two resistors form a voltage divider from the emitter of Q82 If the input at pin 20 ia a minimum TTL high of 20V then the juction of R20 and R31 will have a voltage of 06V This voltage is applied to the bases of Q22 and Q24 06V is just enough voltage to drive transistors Q22 and Q24 into satu- ration forcing the output voltage at pin 17 to drop below 100 mV The OSD video signal is applied during this period The emitter-base junction of Q82 can withstand a maximum reverse bias voltage of 5V thus pin 17 must not be driven above 5V during OSD blanking CONTRAST CONTROL SECTION A simplified schematic of LM1212’s contrast control section is shown in Figure 5 A 0V to 4V DC voltage is applied at the contrast input (pin 8) Transistors Q29 Q30 and Q34 buffer and level shift the contrast voltage to the base of Q36 The voltage at the emitter of Q36 equals the contrast voltage (Vcont) and the current through Q36’s collector is given by IC36 e Vcont R28 Transistor Q36’s collector current is used to unbalance the current through the differential pair comprised of Q38 and Q40 Q40’s base is internally biased at 53V The 53V refer- ence is also connected to pin 1 and to the base of Q10 (see Figure 3 ) The base of Q38 (pin 3) is externally connected to pin 2 through a 10X resistor (see Figures 2 and 3 ) With Vcont e 2V the differential pair (Q38 Q40) is balanced and the voltage at pins 1 and 2 is 53V Under this condition Q8’s collector current is equally split between Q9 and Q10 (see Figure 3 ) and the amplifier’s gain is half the maximum gain If contrast voltage at pin 8 is greater than 2V then Q36’s collector current increases thus pulling Q38’s collec- tor node lower and consequently moving Q38’s base below 53V With pin 2 at a lower voltage than pin 1 current through Q10 (see Figure 3 ) increases and the amplifier’s gain increases With Vcont e 4V the amplifier’s gain is max- imum If the contrast voltage at pin 8 is less than 2V then Q36’s collector current decreases and Q38’s base is pulled above 53V With pin 2 voltage greater than pin 1 voltage less current flows through Q10 (see Figure 3 ) consequently the amplifier’s gain decreases With Vcont e 0V the amplifier’s gain is minimum (ie maximum attenuation) TLH12354 – 10 FIGURE 4 Simplified Schematic of LM1212 Video Amplifier Output Stage http www nationalcom 7 |
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Descripción similar - LM1212N |
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