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SM77D Series 1.8 V
CMOS Clock Oscillators
October 2006
www.pletronics.com
425-776-1880
6
Mechanical:
Inches
mm
A
0.276 +_0.006
7.00 +_0.15
B
0.197 +_0.006
5.00 +_0.15
C
0.073 +_0.012
1.87 +_0.30
D1
0.038
0.96
E1
0.200
5.08
F1
0.004
0.10
G1
0.050
1.27
H1
0.055
1.40
Not to Scale
1 Typical dimensions
I1
0.024
0.60
J1
0.004
0.10R
K1
0.008
0.020R
Contacts :
Gold 11.8 μinches
0.3 μm minimum over Nickel 50 to 350 μinches
1.27 to 8.89 μm
Pad
Function
Note
1
Output
Enable/Disable
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to V
CC if the oscillator is to be always on.
2
Ground (GND)
3
Output
4
Supply Voltage
(V
CC)
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large magnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or mechanical fans.
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