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LM2853MH-1.0 Datasheet(PDF) 10 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM2853MH-1.0
Descripción Electrónicos  3A 550 kHz Synchronous SIMPLE SWITCHER Buck Regulator
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2853MH-1.0 Datasheet(HTML) 10 Page - National Semiconductor (TI)

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Applications Information (Continued)
TABLE 3. Recommended Capacitors (Continued)
Capacitance (µF)
Part Number
Chemistry
Vendor
220
TPSD227M006#0050
Tantalum
AVX
220
NOSD227M0040060
Niobium Oxide
AVX
SPLIT-RAIL OPERATION
The LM2853 can be powered using two separate voltages
for AVIN and PVIN. AVIN is the supply for the control logic;
PVIN is the supply for the power FETs. The output filter
components need to be chosen based on the value of PVIN.
For PVIN levels lower than 3.3V, use output filter component
values recommended for 3.3V. PVIN must always be equal
to or less than AVIN.
20201513
SWITCH NODE PROTECTION
The LM2853 includes protection circuitry that monitors the
voltage on the switch pin. Under certain fault conditions,
switching is disabled in order to protect the switching de-
vices. One side effect of the protection circuitry may be
observed when power to the LM2853 is applied with no or
light load on the output. The output will regulate to the rated
voltage, but no switching may be observed. As soon as the
output is loaded, the LM2853 will begin normal switching
operation.
LAYOUT GUIDELINES
These are several guidelines to follow while designing the
PCB layout for an LM2853 application.
1.
The input bulk capacitor, C
IN, should be placed very
close to the PVIN pin to keep the resistance as low as
possible between the capacitor and the pin. High current
levels will be present in this connection.
2.
All ground connections must be tied together. Use a
broad ground plane, for example a completely filled back
plane, to establish the lowest resistance possible be-
tween all ground connections.
3.
The sense pin connection should be made as close to
the load as possible so that the voltage at the load is the
expected regulated value. The sense line should not run
too close to nodes with high dV/dt or dl/dt (such as the
switch node) to minimize interference.
4.
The switch node connections should be low resistance
to reduce power losses. Low resistance means the trace
between the switch pin and the inductor should be wide.
However, the area of the switch node should not be too
large since EMI increases with greater area. So connect
the inductor to the switch pin with a short, but wide trace.
Other high current connections in the application such
as PVIN and V
OUT assume the same trade off between
low resistance and EMI.
5.
Allow area under the chip to solder the entire exposed
die attach pad to ground for improved thermal perfor-
mance. Lab measurements also show improved regula-
tion performance when the exposed pad is well
grounded.
LM2853 Example Circuit Schematic
20201514
FIGURE 1.
www.national.com
10


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