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REV. 0 ADF4251 –3– TIMING CHARACTERISTICS* Limit at TMIN to TMAX Parameter (B Version) Unit Test Conditions/Comments t1 10 ns min LE Setup Time t2 10 ns min DATA to CLOCK Setup Time t3 10 ns min DATA to CLOCK Hold Time t4 25 ns min CLOCK High Duration t5 25 ns min CLOCK Low Duration t6 10 ns min CLOCK to LE Setup Time t7 20 ns min LE Pulsewidth *Guaranteed by design but not production tested. (VDD1 = VDD2 = VDD3 = DVDD = 3 V 10%, VP1 = VP2 = 5 V 10%, GND = 0 V, unless otherwise noted.) t6 DB1 (CONTROL BIT C2) t3 t4 t5 DB2 t2 t1 t7 CLOCK DB23 (MSB) DB22 DATA LE LE DB0 (LSB) (CONTROL BIT C1) Figure 1. Timing Diagram |
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