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AD7938BCPZ-6 Datasheet(PDF) 3 Page - Analog Devices

No. de pieza AD7938BCPZ-6
Descripción Electrónicos  8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD7938BCPZ-6 Datasheet(HTML) 3 Page - Analog Devices

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AD7938-6
Rev. 0 | Page 3 of 32
SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, internal/external VREF = 2.5 V, unless otherwise noted, FCLKIN = 10 MHz, FSAMPLE = 625 kSPS; TA = TMIN to
TMAX, unless otherwise noted.
Table 1.
Parameter
B Version1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
FIN = 50 kHz sine wave
Signal-to-Noise + Distortion (SINAD)2
70
dB min
Differential mode
68
dB min
Single-ended mode
Signal-to-Noise Ratio (SNR)2
71
dB min
Differential mode
69
dB min
Single-ended mode
Total Harmonic Distortion (THD)2
−73
dB max
−85 dB typ, differential mode
−70
dB max
−80 dB typ, single-ended mode
Peak Harmonic or Spurious Noise (SFDR)2
−73
dB max
−82 dB typ
Intermodulation Distortion (IMD)2
fa = 30 kHz, fb = 50 kHz
Second-Order Terms
−86
dB typ
Third-Order Terms
−90
dB typ
Channel-to-Channel Isolation
−85
dB typ
FIN = 50 kHz, FNOISE = 300 kHz
Aperture Delay2
5
ns typ
Aperture Jitter2
72
ps typ
Full Power Bandwidth2
50
MHz typ
@ 3 dB
10
MHz typ
@ 0.1 dB
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity2
±1
LSB max
Differential mode
±1.5
LSB max
Single-ended mode
Differential Nonlinearity2
Differential Mode
±0.95
LSB max
Guaranteed no missed codes to 12 bits
Single-Ended Mode
−0.95/+1.5
LSB max
Guaranteed no missed codes to 12 bits
Single-Ended and Pseudo-Differential Input
Straight binary output coding
Offset Error2
±6
LSB max
Offset Error Match2
±1
LSB max
Gain Error2
±3
LSB max
Gain Error Match2
±1
LSB max
Fully Differential Input
Twos complement output coding
Positive Gain Error2
±3
LSB max
Positive Gain Error Match2
±1
LSB max
Zero-Code Error2
±6
LSB max
Zero-Code Error Match2
±1
LSB max
Negative Gain Error2
±3
LSB max
Negative Gain Error Match2
±1
LSB max
ANALOG INPUT
Single-Ended Input Range
0 to VREF or 0 to 2 × VREF
V
RANGE bit = 0, or RANGE bit = 1, respectively
Pseudo-Differential Input Range: VIN+
0 to VREF or 2 × VREF
V
RANGE bit = 0, or RANGE bit = 1, respectively
VIN−
−0.3 to +0.7
V typ
VDD = 3 V
−0.3 to +1.8
V typ
VDD = 3 V
Fully Differential Input Range: VIN+ and VIN−
VCM ± VREF/2
V
VCM = common-mode voltage3 = VREF/2
VIN+ and VIN−
VCM ± VREF
V
VCM = VREF, VIN+ or VIN− must remain within GND/VDD
DC Leakage Current4
±1
µA max
Input Capacitance
45
pF typ
When in track
10
pF typ
When in hold


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