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TPS2363PFB Datasheet(PDF) 8 Page - Texas Instruments |
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TPS2363PFB Datasheet(HTML) 8 Page - Texas Instruments |
8 / 41 page www.ti.com TPS2363 SLUS680A – JANUARY 2006 – REVISED FEBRUARY 2006 DEVICE INFORMATION (continued) TERMINAL FUNCTIONS (continued) TERMINAL NAME I/O DESCRIPTION NO. TPS2363 MIC2592B 3.3-V channel output, used to monitor the SlotA/B voltage for power good. When the main power is turned off, there is a 1.2-k Ω pull-down, OUT33A/B 3VOUTA/B 16/21 I/O bleed-down circuit, when all the voltages are below 100 mV slot power off can be read from the SMBus. GND GND 17, 46, 33 Ground AUXHIA/B are used to select high AUX current, 800 mA. These pins are pulled up to AUXINA/B with a 10-k Ω maximum resistor for 800 mA AUXHIA/B N/C 18, 19 I selection. It has an internal 40-k Ω pull-down resistor so it may be NC or connected to ground for the default 400 mA VAUXA/B. The AUX high current feature is only on the TPS2363. A 110-k Ω resistor from this pin to ground improves fault timer accuracy. RFILTER A&B RFILTER [A&B] 20 I See fault timer section for more information. INT is an open drain output, active low when a fault occurs. The SMBus interrupt mask disables the output. INT is cleared through reset of the INT /INT 37 O status registers. This is described in the SMBus programming section. This pin should be pulled up 3.3-V or AUXINA/B through an external 10-k Ω resistor at the end of the bus. SMBus address selection inputs. These inputs are internally pulled up to 3.3-V or AUXINA/B with a 40-k Ω resistor; leave the pins open to program A0, A1, A2 A0, A1, A2 41/40/39 I a logic one or connect to ground for a zero. The controller reads the address bits at initialization only. This active high signal turns on the VAUX slot voltage. Taking this signal AUXENA/B AUXENA/B 45/42 I low clears a fault on the slot caused by the VAUX voltages. Connect these pins to ground when using the SMBus interface for control. This active high signal turned on the main slot voltages. Taking this signal ONA/B ONA/B 44/43 I low clears a fault on the slot caused by the main voltages. Connect these pins to ground when using the SMBus interface for control. SMBus clock input. This pin should be pulled up 3.3 V or AUXIN through SCL SCL 47 I an external 10-k Ω resistor at the end of the bus. SMBus data in/output and address input. This pin should be pulled up SDA SDA 48 I/O 3.3-V or AUXIN through an external 10-k Ω resistor at the end of the bus. 8 Submit Documentation Feedback |
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