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SN74GTL2010PWRE4 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74GTL2010PWRE4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 15 page www.ti.com SA00647 SREF S1 S10 DREF D1 D10 GREF GTL2010 10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR SCDS221 – SEPTEMBER 2006 FUNCTION TABLES(1) ABC HIGH-to-LOW Translation (Assuming Dn is at the Higher Voltage Level) INPUTS OUTPUTS GREF(2) DREF SREF TRANSISTOR D10–D1 S10–S1 H H 0 V X X Off H H VTT(3) H VTT(4) On H H VTT L L(5) On L L 0 – VTT X X Off (1) H = HIGH voltage level, L = LOW voltage level, X = don't care (2) GREF should be at least 1.5 V higher than SREF for best translator operation. (3) VTT is equal to the SREF voltage. (4) Sn is not pulled up or pulled down. (5) Sn follows the Dn input LOW. LOW-to-HIGH Translation (Assuming Dn is at the Higher Voltage Level)(1) INPUTS OUTPUTS GREF(2) DREF SREF TRANSISTOR D10–D1 S10–S1 H H 0 V X X Off H H VTT(3) VTT H(4) Nearly off H H VTT L L(5) On L L 0 – VTT X X Off (1) H = HIGH voltage level, L = LOW voltage level, X = don't care (2) GREF should be at least 1.5 V higher than SREF for best translator operation. (3) VTT is equal to the SREF voltage. (4) Dn is pulled up to VCC through an external resistor. (5) Dn follows the Sn input LOW. CLAMP SCHEMATIC 3 Submit Documentation Feedback |
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