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ST72345 Datasheet(PDF) 5 Page - STMicroelectronics |
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ST72345 Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 191 page ST72340, ST72344, ST72345 5/191 1 INTRODUCTION The ST7234x devices are members of the ST7 mi- crocontroller family. All devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. They feature single-voltage FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In- Application Programming (IAP) capabilities. Under software control, all devices can be placed in WAIT, SLOW, Auto-Wakeup from Halt, Active- HALT or HALT mode, reducing power consump- tion when the application is in idle or stand-by state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. The devices feature an on-chip Debug Module (DM) to support in-circuit debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual. Figure 1. General Block Diagram 8-BIT CORE ALU OSC1 CONTROL PROGRAM (16K - 32K Bytes) VDD RESET PORT F PF (6-bits) TIMER A BEEP PORT A RAM (512- 1024 Bytes) PORT C 10-BIT ADC VAREF VSSA PORT B PB (5-bits) PWM ART TIMER B PA (5-bits) PORT D PD (6-bits) SPI PC (8-bits) VSS WATCHDOG CLOCK CONTROL LVD OSC2 MEMORY MCC/RTC/BEEP AVD I2CMMS PORT E PE (2-bits) SCI I2C3SNS INTERNAL RC |
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