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BUK104-50LP Datasheet(PDF) 3 Page - NXP Semiconductors |
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BUK104-50LP Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 14 page Philips Semiconductors Product specification PowerMOS transistor BUK104-50L/S Logic level TOPFET BUK104-50LP/SP OVERVOLTAGE CLAMPING LIMITING VALUES At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT I DRRM Repetitive peak clamping drain current R IS ≥ 100 Ω 1 -15 A E DSM Non-repetitive inductive turn-off I DM = 15 A; RIS ≥ 100 Ω - 200 mJ energy 2 E DRM Repetitive inductive turn-off energy R IS ≥ 100 Ω; Tmb ≤ 95 ˚C; - 20 mJ I DM = 4 A; VDD ≤ 20 V; f = 250 Hz I DIRM Repetitive peak drain to input current 3 R IS = 0 Ω; tp ≤ 1 ms - 50 mA REVERSE DIODE LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT I S Continuous forward current T mb = 25 ˚C; - 15 A V IS = VPS = VFS = 0 V THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Thermal resistance R th j-mb Junction to mounting base - - 2.5 3.1 K/W R th j-a Junction to ambient in free air - 60 - K/W STATIC CHARACTERISTICS T mb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V (CL)DSR Drain-source clamping voltage R IS = 100 Ω; ID = 10 mA 50 - 65 V V (CL)DSR Drain-source clamping voltage R IS = 100 Ω; IDM = 1 A; tp ≤ 300 µs; 50 - 70 V δ ≤ 0.01 I DSS Zero input voltage drain current V DS = 12 V; VIS = 0 V - 0.5 10 µA I DSR Drain source leakage current V DS = 50 V; RIS = 100 Ω;- 1 20 µA I DSR Drain source leakage current V DS = 40 V; RIS = 100 Ω; T j = 125 ˚C - 10 100 µA R DS(ON) Drain-source on-state I DM = 7.5 A; V IS = 7 V - 75 100 m Ω resistance t p ≤ 300 µs; δ ≤ 0.01 V IS = 5 V - 95 125 m Ω 1 The input pin must be connected to the source pin by a specified external resistance to allow the power MOSFET gate source voltage to become sufficiently positive for active clamping. Refer to INPUT CHARACTERISTICS. 2 While the protection supply voltage is connected, during overvoltage clamping it is possible that the overload protection may operate at energies close to the limiting value. Refer to OVERLOAD PROTECTION CHARACTERISTICS. 3 Shorting the input to source with low resistance inhibits the internal overvoltage protection by preventing the power MOSFET gate source voltage becoming positive. January 1993 3 Rev 1.200 |
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