BUK104-50SP datasheet(11/14 Pages) PHILIPS

No. de pieza	BUK104-50SP

Descripción Electrónicos	PowerMOS transistor Logic level TOPFET

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Fabricante Electrónico	PHILIPS [NXP Semiconductors]

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Philips Semiconductors

Product specification

PowerMOS transistor

BUK104-50L/S

Logic level TOPFET

BUK104-50LP/SP

Fig.28. Typical resistive load switching waveforms

R

I = RIS = 50 Ω; RL = 10 Ω; VDD = 15 V; Tj = 25 ˚C

Fig.29. External input resistances R

I and RIS,

generator voltage V

II and input voltage VIS.

Fig.30. Typical capacitances, C

iss, Coss, Crss.

C = f(V

DS); conditions: VIS = 0 V; f = 1 MHz

Fig.31. Typical off-state leakage current.

I

DSR = f(Tj); Conditions: VDS = 40 V; RIS = 100 Ω.

Fig.32. Normalised protection supply current.

I

PS/IPS25 ˚C = f(Tj); VPS = VPSN

0

0.5

1

time / us

VIS / V & VDS / V

BUK104-50L/S

15

10

5

0

VDS

VIS

0

20

40

60

80

100

120

140

Tj / C

Idsr

1 mA

100 uA

10 uA

1 uA

100 nA

typ.

D

S

I

TOPFET

P

F

P

VII

RI

RIS

VIS

-60

-20

20

60

100

140

180

Tj / C

Ips normalised to 25 C

1.5

1

0.5

0

20

40

VDS / V

Capacitance / pF

BUK104-50L/S

10000

1000

100

10

50

30

10

Ciss

Coss

Crss

January 1993

11

Rev 1.200

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