SN74ABT18646

SCAN TEST DEVICE

WITH 18-BIT TRANSCEIVER AND REGISTER

SCBS131A – AUGUST 1992 – REVISED JANUARY 2002

1

POST OFFICE BOX 655303

Widebus

 Family

(JTAG) Test Access Port and

Boundary-Scan Architecture

Circuitry to Provide Multiplexed

Transmission of Stored and Real-Time Data

Greater Flexibility

– IEEE Std 1149.1-1990 Required

Instructions, Optional INTEST, and

P1149.1A CLAMP and HIGHZ

– Parallel Signature Analysis at Inputs

With Masking Option

– Pseudorandom Pattern Generation From

Outputs

– Sample Inputs/Toggle Outputs

– Binary Count From Outputs

– Device Identification

– Even-Parity Opcodes

18 19

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

20

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

21 22 23 24

63 62 61 60 59

64

58

56 55 54

57

25 26 27 28 29

53 52

17

51 50 49

30 31 32

1A3

1A4

1A5

GND

1A6

1A7

1A8

1A9

2A1

2A2

2A3

GND

2A4

2A5

2A6

1B4

1B5

1B6

GND

1B7

1B8

1B9

2B1

2B2

2B3

2B4

GND

2B5

2B6

2B7

PM PACKAGE

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description

This scan test device with a 18-bit bus transceiver and register is a member of the Texas Instruments SCOPE



testability IC family. This device supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex

circuit board assemblies. Scan access to the test circuitry is accomplished via the four-wire test access port

(TAP) interface.

Copyright

 2002, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SCOPE and Widebus are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.