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J111RLRAG Datasheet(PDF) 4 Page - ON Semiconductor

No. de pieza J111RLRAG
Descripción Electrónicos  JFET Chopper Transistors N?묬hannel - Depletion
Download  5 Pages
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Fabricante Electrónico  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

J111RLRAG Datasheet(HTML) 4 Page - ON Semiconductor

  J111RLRAG Datasheet HTML 1Page - ON Semiconductor J111RLRAG Datasheet HTML 2Page - ON Semiconductor J111RLRAG Datasheet HTML 3Page - ON Semiconductor J111RLRAG Datasheet HTML 4Page - ON Semiconductor J111RLRAG Datasheet HTML 5Page - ON Semiconductor  
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J111, J112
http://onsemi.com
4
NOTE 2
The Zero−Gate−Voltage Drain Current (IDSS), is the
principle determinant of other J-FET characteristics.
Figure 10 shows the relationship of Gate−Source Off
Voltage (VGS(off) and Drain−Source On Resistance
(rds(on)) to IDSS. Most of the devices will be within
±10%
of the values shown in Figure 10. This data will be useful
in predicting the characteristic variations for a given part
number.
For example:
Unknown
rds(on) and VGS range for an J112
The electrical characteristics table indicates that an J112
has an IDSS range of 25 to 75 mA. Figure 10, shows
rds(on) = 52
W for IDSS = 25 mA and 30 W for
IDSS = 75 mA. The corresponding VGS values are 2.2 V
and 4.8 V.
2.0
3.0
5.0
7.0
10
20
0.5 0.7
1.0
2.0
3.0
5.0 7.0 10
20
30
50
ID, DRAIN CURRENT (mA)
Figure 6. Typical Forward Transfer Admittance
1.0
1.5
2.0
3.0
5.0
7.0
10
15
0.03 0.05
0.1
0.3 0.5
1.0
3.0 5.0
10
30
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Typical Capacitance
200
160
120
80
40
0
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
VGS, GATE−SOURCE VOLTAGE (VOLTS)
Figure 8. Effect of Gate−Source Voltage
On Drain−Source Resistance
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
−70
−40
−10
20
50
80
110
140
170
Tchannel, CHANNEL TEMPERATURE (°C)
Figure 9. Effect of Temperature On
Drain−Source On−State Resistance
J113
J112
J111
Tchannel = 25°C
VDS = 15 V
Cgs
Cgd
Tchannel = 25°C
(Cds IS NEGLIGIBLE)
IDSS
= 10
mA
25
mA
50mA
75mA 100mA
125mA
Tchannel = 25°C
ID = 1.0 mA
VGS = 0
10
IDSS, ZERO−GATE−VOLTAGE DRAIN CURRENT (mA)
Figure 10. Effect of IDSS On Drain−Source
Resistance and Gate−Source Voltage
20 30
40 50 60
70 80 90 100 110 120 130 140 150
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
100
90
80
70
60
50
40
30
20
10
0
Tchannel = 25°C
rDS(on) @ VGS = 0
VGS(off)


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