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MC10E212FNR2 Datasheet(PDF) 1 Page - ON Semiconductor |
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MC10E212FNR2 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 7 page © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 5 1 Publication Order Number: MC10E212/D MC10E212, MC100E212 5VECL 3-Bit Scannable Registered Address Driver The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to conserve array output cell functionality and also output pins. The input shift register is designed with control logic which greatly facilitates its use in boundary scan applications. The 100 Series contains temperature compensation. • Scannable Version E112 Driver • 1025 ps Max. CLK to Output • Dual Differential Outputs • Master Reset • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V • NECL Mode Operating Range: VCC= 0 V with VEE= −4.2 V to −5.7 V • Internal Input Pulldown Resistors • ESD Protection: > 1 KV HBM, > 75 V MM • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D • Flammability Rating: UL−94 code V−0 @ 1/8”, Oxygen Index 28 to 34 • Transistor Count = 259 devices Device Package Shipping ORDERING INFORMATION MC10E212FN PLCC−28 37 Units/Rail MC10E212FNR2 PLCC−28 500 Units/Reel MC100E212FN PLCC−28 37 Units/Rail MC100E212FNR2 PLCC−28 500 Units/Reel MARKING DIAGRAMS A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week PLCC−28 FN SUFFIX CASE 776 MC10E212FN AWLYYWW MC100E212FN AWLYYWW http://onsemi.com 128 128 |
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