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| SN65LVDS047_06 |
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 TI
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6 page 
www.ti.com DIN D CL CL DOUT+ DOUT– 1.2 V 50 Ω 50 Ω 50 Ω Generator EN EN VCC GND 1/4 65LVDS047 1.5 V 1.5 V 50% 50% 50% 50% tPHZ tPZH tPLZ tPZL EN When EN = GND or Open EN When EN = VCC DOUT+ When DIN = VCC DOUT– When DIN = GND DOUT+ When DIN = GND DOUT– When DIN = VCC 3 V 0 V 3 V 0 V 1.5 V 1.5 V VOH 1.2 V 1.2 V VOL SLLS416B – JUNE 2000 – REVISED DECEMBER 2003 PARAMETER MEASUREMENT INFORMATION (continued) Figure 4. Driver 3-State Delay Test Circuit Figure 5. Driver 3-State Delay Waveform 6 |
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