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AM26C32IPWRG4 Datasheet(PDF) 5 Page - Texas Instruments |
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AM26C32IPWRG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 17 page AM26C32 QUADRUPLE DIFFERENTIAL LINE RECEIVER SLLS104I − DECEMBER 1990 − REVISED SEPTEMBER 2004 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Differential input high-threshold voltage VO = VOH(min), VIC = −7 V to 7 V 0.2 V VIT+ Differential input high-threshold voltage VO = VOH(min), IOH = −440 µA VIC = 0 to 5.5 V 0.1 V VIT− Differential input low-threshold voltage VO = 0.45 V, VIC = −7 V to 7 V −0.2‡ V VIT− Differential input low-threshold voltage VO = 0.45 V, IOL = 8 mA VIC = 0 to 5.5 V −0.1‡ V Vhys Hysteresis voltage (VIT+ − VIT−) 60 mV VIK Enable input clamp voltage VCC = 4.5 V, II = −18 mA −1.5 V VOH High-level output voltage VID = 200 mV, IOH = −6 mA 3.8 V VOL Low-level output voltage VID = −200 mV, IOL = 6 mA 0.2 0.3 V IOZ Off-state (high-impedance state) output current VO = VCC or GND ±0.5 ±5 µA II Line input current VI = 10 V, Other input at 0 V 1.5 mA II Line input current VI = −10 V, Other input at 0 V −2.5 mA IIH High-level enable current VI = 2.7 V 20 µA IIL Low-level enable current VI = 0.4 V −100 µA ri Input resistance One input to ground 12 17 k Ω ICC Supply current VCC = 5.5 V 10 15 mA † All typical values are at VCC = 5 V, VIC = 0, and TA = 25°C. ‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage. switching characteristics over recommended ranges of operation conditions, CL = 50 pF (unless otherwise noted) PARAMETER TEST CONDITIONS AM26C32C AM26C32I AM26C32Q AM26C32M UNIT PARAMETER CONDITIONS MIN TYP† MAX MIN TYP† MAX UNIT tPLH Propagation delay time, low- to high-level output See Figure 1 9 17 27 9 17 27 ns tPHL Propagation delay time, high- to low-level output See Figure 1 9 17 27 9 17 27 ns tTLH Output transition time, low- to high-level output See Figure 1 4 9 4 10 ns tTHL Output transition time, high- to low-level output See Figure 1 4 9 4 9 ns tPZH Output enable time to high level See Figure 2 13 22 13 22 ns tPZL Output enable time to low level See Figure 2 13 22 13 22 ns tPHZ Output disable time from high level See Figure 2 13 22 13 26 ns tPLZ Output disable time from low level See Figure 2 13 22 13 25 ns † All typical values are at VCC = 5 V, TA = 25°C. |
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